B81C2203/0778

PACKAGING FOR MEMS TRANSDUCERS

This application describes methods and apparatus relating to packaging of MEMS transducers and to MEMS transducer packages. The application describes a MEMS transducer package (300) having a first integrated circuit die (200) which has an integrated MEMS transducer (202) and integrated electronic circuitry (203) for operation of the MEMS transducer. The package is arranged such that the footprint of the MEMS transducer package is substantially the same size as the footprint of the integrated circuit die. At least part of the first integrated circuit die (200) may form a sidewall of the package. The package may be formed by a first package cover (302) which overlies the MEMS transducer and a second package cover (301) on the other side of the first integrated circuit die.

Semiconductor structure and fabrication method thereof

A method for fabricating a semiconductor structure includes providing a substrate with a first surface and a second surface, wherein at least one soldering pad is formed on the first surface of the substrate. The method also includes forming at least one via to expose each soldering pad by etching the substrate from the second surface, forming a seed layer to cover the second surface of the substrate and the sidewall and the bottom surfaces of each via, and then forming a redistribution metal layer over a portion of the seed layer formed on the sidewall and the bottom surfaces of each via and the second surface of the substrate surrounding each via. The method further includes alternately performing a pre-wetting process and a chemical etching process to completely remove the portion of the seed layer not covered by the redistribution metal layer.

MANUFACTURING METHOD FOR A MICROMECHANICAL PRESSURE SENSOR DEVICE AND CORRESPONDING MICROMECHANICAL PRESSURE SENSOR DEVICE
20170166436 · 2017-06-15 ·

A manufacturing method for a micromechanical sensor device and a corresponding micromechanical sensor device. The method includes providing a substrate including at least one first through a fourth parallel trenches; depositing a layer onto the front side, the trenches being sealed, and structuring the layer, contact structures being formed in the layer above the second and fourth trenches; oxidizing of outwardly free-standing side surfaces of the contact structures as well as of the second and fourth trenches, at least in areas; depositing and structuring a first metallic contacting material, the contact structures being filled with the first metallic contacting material, at least in areas; opening the second trench and the fourth trench; galvanic deposition of a second metallic contacting material into the second and fourth trenches, resulting in the formation of a pressure-sensitive capacitive capacitor structure; and opening the first trench from the front side of the substrate.

MEMS Device Structure with a Capping Structure
20170158494 · 2017-06-08 ·

An integrated circuit device includes a dielectric layer disposed over a semiconductor substrate, the dielectric layer having a sacrificial cavity formed therein, a membrane layer formed onto the dielectric layer, and a capping structure formed on the membrane layer such that a second cavity is formed, the second cavity being connected to the sacrificial cavity through a via formed into the membrane layer.

Two-port SRAM connection structure

A static random access memory (SRAM) device is provided in accordance with some embodiments. The SRAM device comprises a plurality of two-port SRAM arrays, which comprise a plurality of two-port SRAM cells. Each two-port SRAM cell comprises a write port portion, a read port portion, a first plurality of metal lines located in a first metal layer, a second plurality of metal lines located in a second metal layer, a third plurality of metal lines located in a third metal layer a plurality of edge cells, a plurality of well strap cells, and a plurality of jumper structures. Each jumper structure comprises first, second, and third metal landing pads located in the second metal layer and electrically connecting metal lines of the first and third metal layers.

PACKAGING FOR MEMS TRANSDUCERS

This application describes methods and apparatus relating to packaging of MEMS transducers and to MEMS transducer packages. The application describes a MEMS transducer package (300) having a first integrated circuit die (200) which has an integrated MEMS transducer (202) and integrated electronic circuitry (203) for operation of the MEMS transducer. The package is arranged such that the footprint of the MEMS transducer package is substantially the same size as the footprint of the integrated circuit die. At least part of the first integrated circuit die (200) may form a sidewall of the package. The package may be formed by a first package cover (302) which overlies the MEMS transducer and a second package cover (301) on the other side of the first integrated circuit die.

Semiconductor structure with micro-electro-mechanical system devices

A semiconductor structure having micro-electro-mechanical system (MEMS) devices is provided. One of the MEMS devices includes a substrate having a first region and a second region; a membrane structure formed in the first region and positioned correspondingly to a cavity of the substrate; a logic device formed in the second region, and electrically connected to the membrane structure; an interconnection structure formed in the second region, and the interconnection structure formed on the substrate and covering the logic device; and an etching stop layer formed in the second region, and the etching stop layer formed on the interconnection structure and including a nitride layer and a carbon-containing layer formed on the nitride layer. Also, a variation in resonant frequencies of the MEMS devices on the entire wafer is less than 10%.

MEMS device structure with a capping structure

An integrated circuit device includes a dielectric layer disposed over a semiconductor substrate, the dielectric layer having a sacrificial cavity formed therein, a membrane layer formed onto the dielectric layer, and a capping structure formed on the membrane layer such that a second cavity is formed, the second cavity being connected to the sacrificial cavity though a via formed into the membrane layer.

SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF

A method for fabricating a semiconductor structure includes providing a substrate with a first surface and a second surface, wherein at least one soldering pad is formed on the first surface of the substrate. The method also includes forming at least one via to expose each soldering pad by etching the substrate from the second surface, forming a seed layer to cover the second surface of the substrate and the sidewall and the bottom surfaces of each via, and then forming a redistribution metal layer over a portion of the seed layer formed on the sidewall and the bottom surfaces of each via and the second surface of the substrate surrounding each via. The method further includes alternately performing a pre-wetting process and a chemical etching process to completely remove the portion of the seed layer not covered by the redistribution metal layer.