A transistor includes: a substrate; a constant current formation layer provided on the substrate; a pair of source/drain patterns provided on the constant current formation layer; a gate electrode provided between the pair of source/drain patterns; a channel pattern extending in a direction between the pair of source/drain patterns; and a gate insulating layer surrounding the channel pattern, wherein the channel pattern penetrates the gate insulating layer and the gate electrode and is electrically connected to the source pattern and the drain pattern, the gate insulating layer separates the channel pattern and the gate electrode from each other, the constant current formation layer generates a constant current between the drain pattern and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

A method for manufacturing a semiconductor device includes: forming a first type well in a substrate; and after forming the first type well in the substrate, forming a second type well in the substrate, where the second type well has a conductivity type different from that of the first type well. One of the first and second type wells is formed by sequentially performing multiple ion implantations that use different energies, and one of the ion implantations that uses a lowest energy among the ion implantations is performed first among the ion implantations.

The invention provides a semiconductor structure, the semiconductor structure includes a substrate, two shallow trench isolation structures are located in the substrate, a first region, a second region and a third region are defined between the two shallow trench isolation structures, the second region is located between the first region and the third region. Two thick oxide layers are respectively located in the first region and the third region and directly contact the two shallow trench isolation structures respectively, and a thin oxide layer is located in the second region, the thickness of the thick oxide layer in the first region is greater than that of the thin oxide layer in the second region.

A manufacturing method of a semiconductor device includes the following steps. A base region is formed in a substrate. A protective layer is formed on the substrate and covers the base region. First and second sacrificial layers are formed on the substrate and cover the protective layer. A source region, a well region, and a junction field effect transistor (JFET) region are formed in the substrate. When the source region, the well region, and the JFET region are formed in sequence, the source region and the well region are formed by the first sacrificial layer, and the JFET region is formed by the second sacrificial layer. When the JFET region, the well region, and the source region are formed in sequence, the JFET region is formed by the first sacrificial layer, and the well region and the source region are formed by the second sacrificial layer.

According to some embodiments of the present disclosure, methods of forming a semiconductor device on a semiconductor layer having opposing first and second surfaces are disclosed. An n-type doped region including an n-type dopant may be formed at the first surface of the semiconductor layer. A p-type dopant source layer including a p-type dopant may be formed on the n-type doped region. The p-type dopant may be diffused from the p-type dopant source layer through the n-type doped region into the semiconductor layer to form a p-type doped region of the semiconductor layer, and the p-type doped region of the semiconductor layer may be between the n-type doped region and the second surface of the semiconductor layer. After diffusing the p-type dopant, the p-type dopant source layer may be removed.