H10W74/47

Packaging structure and manufacturing method thereof

The present invention provides a packaging structure and a manufacturing method thereof. The packaging structure includes a lower package, an upper package and a first redistribution stack layer disposed between the lower package and the upper package, wherein the first redistribution stack layer is electrically connected to the lower package and the upper package; the lower package includes a prefabricated substrate and a first plastic packaging layer surrounding the periphery of the prefabricated substrate; and the minimum line width/line spacing of the first redistribution stack layer is less than the minimum line width/line spacing of the prefabricated substrate. The lower package includes the prefabricated substrate and the first redistribution stack layer is disposed above the prefabricated substrate and has the minimum line width/line spacing less than that of the prefabricated substrate, so that more chips and/or device packages are integrated in the packaging structure.

Packaging structure and manufacturing method thereof

The present invention provides a packaging structure and a manufacturing method thereof. The packaging structure includes a lower package, an upper package and a first redistribution stack layer disposed between the lower package and the upper package, wherein the first redistribution stack layer is electrically connected to the lower package and the upper package; the lower package includes a prefabricated substrate and a first plastic packaging layer surrounding the periphery of the prefabricated substrate; and the minimum line width/line spacing of the first redistribution stack layer is less than the minimum line width/line spacing of the prefabricated substrate. The lower package includes the prefabricated substrate and the first redistribution stack layer is disposed above the prefabricated substrate and has the minimum line width/line spacing less than that of the prefabricated substrate, so that more chips and/or device packages are integrated in the packaging structure.

Insulation module and gate driver
12581992 · 2026-03-17 · ·

This insulation module is provided with: a first conductor and a second conductor, which are buried in an insulating layer so as to face each other at a distance in the thickness direction of the insulating layer; a first electrode which is connected to the first conductor; a second electrode which is connected to the second conductor, while being arranged at a position that is away from the first electrode when viewed from the thickness direction of the insulating layer; a passivation layer which is formed on the surface of the insulating layer; a low dielectric constant layer which is formed on the surface of the passivation layer, and has a lower dielectric constant than the passivation layer; and a mold resin which covers the low dielectric constant layer.

MANUFACTURING METHOD OF PACKAGE STRUCTURE
20260082950 · 2026-03-19 ·

A manufacturing method of a package structure includes: forming a redistribution layer on a top surface of a glass substrate; forming a protective layer on the top surface of the glass substrate; cutting the glass substrate and the protective layer such that the glass substrate has a cutting edge, in which a crack is formed in the cutting edge of the glass substrate; and heating the protective layer such that a portion of the protective layer flows towards a bottom surface of the glass substrate to cover the cutting edge of the glass substrate and fill the crack in the cutting edge of the glass substrate.

ADHESIVE FILM AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE

An adhesive film of the present invention includes a base material layer, an adhesive resin layer provided on a first surface side of the base material layer, and an adhesive resin layer provided on a second surface side of the base material layer and of which an adhesive force is reduced by an external stimulus. When a mass of the adhesive film after heating and drying at 130 C. for 30 minutes is defined as W.sub.1 and the mass of the adhesive film after the heated and dried adhesive film is left for 24 hours at 25 C. under an atmosphere of 50% RH to absorb water is defined as W.sub.2, an average water absorption rate indicated by 100(W.sub.2W.sub.1)/W.sub.1 is 0.90% by mass or less.

CHIP AND TRANSFER SUBSTRATE BASED ON LOW-MODULUS SUPRAMOLECULAR COATING MATERIAL AND TRANSFER METHOD
20260082862 · 2026-03-19 ·

A chip based on a low-modulus supramolecular coating material includes a chip body and a low-modulus supramolecular coating provided on one side of the chip away from a growth substrate, wherein the chip body is of a cylindrical or columnar structure, the low-modulus supramolecular coating is completely or partially coated on a surface of the chip, and an area of the low-modulus supramolecular coating is less than or equal to an area of the chip body. The transfer substrate includes a substrate and a low-modulus supramolecular coating, wherein the low-modulus supramolecular coating is patterned and modified on a surface of the substrate to form a plurality of transfer sites, and a position and a size of each transfer site correspond to distribution and sizes of the transferred chips. The present application addresses problems such as complicated structures, relatively low transfer efficiency, poor precision and vulnerability of the transferred chips.

Semiconductor production device sealing material

A seal material for a semiconductor manufacturing device is made of a rubber composition containing fluororubber and phenol resin powder. The content of the phenol resin powder is 1 part by mass or more and 50 parts by mass or less with respect to 100 parts by mass of the fluororubber. The average particle size of the phenol resin powder is 1 m or more and 20 m or less.

Semiconductor device comprising a semiconductor die and a carrier both covered by a parylene coating

A semiconductor device includes a carrier comprising a recess, a semiconductor die disposed in the recess, and a parylene coating covering at least portions of the surfaces of the semiconductor die and the carrier.

Semiconductor device comprising a semiconductor die and a carrier both covered by a parylene coating

A semiconductor device includes a carrier comprising a recess, a semiconductor die disposed in the recess, and a parylene coating covering at least portions of the surfaces of the semiconductor die and the carrier.

Electronic device and manufacturing method thereof

The present disclosure provides an electronic device including a first electronic unit, a second electronic unit, a circuit layer, a protection layer, and a flexible member. The first electronic unit is electrically connected to the second electronic unit through the circuit layer. The protection layer is disposed corresponding to the first electronic unit and the second electronic unit, and the protection layer has an opening. At least a portion of the flexible member is disposed in the opening. The protection layer has a first Young's modulus, the flexible member has a second Young's modulus, and the first Young's modulus is greater than the second Young's modulus.