Disclosed herein is a method for manufacturing a semiconductor comprising mechanically connecting one or more separate semiconductor components to a common intermediate carrier, arranging the intermediate carrier with respect to a substrate so that, at least for a majority of the semiconductor components, at least one solder pad of a particular semiconductor component lies opposite a solder pad of the substrate associated therewith forming a solder joint, and connecting mutually associated solder pads of the one or more semiconductor components and the substrate by melting and solidifying a solder material arranged between the mutually associated solder pads. A surface tension of the solder material between the mutually associated solder pads of the substrate and the one or more semiconductor components sets a predetermined position of the intermediate carrier relative to the substrate, in which the one or more semiconductor components assume a target position relative to the substrate.

A multi-layered board includes an upper insulating layer, a lower conductive layer including first lower conductive parts, an upper conductive layer between the lower conductive layer and the upper insulating layer and including first upper conductive parts and second upper conductive parts, and a lower insulating layer between the lower conductive layer and the upper conductive layer. The first upper conductive part includes a first pad exposed from a hole of the upper insulating layer. The second upper conductive part includes a second pad exposed from a hole of the upper insulating layer. At least a part of the first pad is in direct contact with the first lower conductive part within a hole of the lower insulating layer. The second pad is outside any hole of the lower insulating layer. A top surface of the second pad is higher than a top surface of the first pad.

Aspects of the present invention provide a semiconductor structure. The semiconductor structure may include a substrate having a first substrate alignment structure. The semiconductor structure may also include a first die with a first die alignment structure. The first die may be attached to the substrate with the first substrate alignment structure matched to the first die alignment structure.