A semiconductor device includes: a semiconductor element; and a first conductor and a second conductor respectively joined to a first surface and a second surface of the semiconductor element via Sn-based solder, in which a Ni-based plated layer is formed on surfaces of the first conductor and the second conductor that oppose the Sn-based solder and on the first surface and the second surface of the semiconductor element, and an interface reaction inhibition layer made of (Cu, Ni).sub.6Sn.sub.5 and having a layer thickness of 1.2 to 4.0 m is formed at an interface between the Ni-based plated layer and the Sn-based solder.

A conductive member constituting a wiring structure includes a first bonding section bonded to an electronic component, a second bonding section bonded to a connection target for the electronic component, and a raised section that protrudes upward from the first bonding section and is connected to the second bonding section. The conductive member has a wire member passage through which a wire member passes, and which is provided in at least a part of the raised section. The wire member passage enables the wire member to be disposed along the raised section from the first bonding section to the second bonding section such that the wire member intersects a surface of the raised section.

A package structure includes a circuit substrate, a semiconductor package, a first ring structure and a second ring structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The first ring structure is attached to the circuit substrate and surrounding the semiconductor package, wherein the first ring structure includes a central opening and a plurality of corner openings extending out from corners of the central opening, the semiconductor package is located in the central opening, and the plurality of corner openings is surrounding corners of the semiconductor package.

A display module includes: a substrate having a mounting surface, four side surfaces, and a rear surface opposite to the mounting surface, the substrate including a thin film transistor layer (TFT) provided on the mounting surface; a plurality of inorganic light-emitting diodes provided on the mounting surface of the substrate; a side wiring electrically connected to the TFT layer and extending along a first pair of side surfaces among the four side surfaces of the substrate; a front cover covering the TFT layer and the plurality of inorganic light emitting devices in a first direction; a metal plate provided on the rear surface of the substrate; a side cover covering the side wiring and the four side surfaces; and a side member provided on a side of the side cover and grounded to the metal plate, wherein the side member is provided on a first side surface of the first pair of side surfaces along which the side wiring extends among the four side surfaces.

A system comprises: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a power switch including a drain terminal, a source terminal, and a gate terminal; and a controller configured to detect a change in current at the source terminal of the power switch using a complex impedance of a metal trace connected to the source terminal of the power switch, and control a gate control signal to the gate terminal based on the detected change in current.

A semiconductor packaging device includes a packaging module, a heat dissipation cover and a thermal interface material layer. The package module includes a substrate, and a working chip mounted on the substrate. The heat dissipation cover includes a metal cover fixed on the substrate and covering the working chip, an accommodating recess located on the metal cover to accommodate the working chip, and a plurality of protrusive columns respectively formed on the metal cover and distributed within the accommodating recess at intervals. The depth of the accommodating recess is greater than the height of each protrusive column, and the accommodating recess is greater than the working chip. The thermal interface material layer is non-solid, and located within the accommodating recess between the protrusive columns to wrap the protrusive columns and contact with the working chip, the metal cover and the protrusive columns.

A module arrangement for power semiconductor devices, includes two or more heat spreading layers with a first surface and a second surface being arranged opposite to the first surface. At least two or more power semiconductor devices are arranged on the first surface of the heat spreading layer and electrically connected thereto. An electrical isolation stack comprising an electrically insulating layer and electrically conductive layers is arranged in contact with the second surface of each heat spreading layer. The at least two or more power semiconductor devices, the heat spreading layers and a substantial part of each of the electrical isolation stacks are sealed from their surrounding environment by a molded enclosure. Accordingly, similar or better thermal characteristic of the module can be achieved instead of utilizing high cost electrically insulating layers, and double side cooling configurations can be easily implemented, without the use of a thick baseplate.

The semiconductor stacked package including a semiconductor die. The semiconductor die includes a substrate, a transistor, and a through-silicon-via (TSV) structure. The transistor is over the substrate. The TSV structure penetrates the substrate and comprises a first conductive layer, a second conductive layer, and a dielectric layer. The dielectric layer is between the first conductive layer and the second conductive layer. The method of manufacturing the same includes the following steps: forming a via hole in a substrate; forming a first conductive layer in the via hole; forming a dielectric layer in the via hole and over the first conductive layer; forming a second conductive layer in the via hole and over the dielectric layer; and forming a transistor over the substrate. The first conductive layer, the dielectric layer, and the second conductive layer collectively form a through-silicon-via (TSV) structure.

A semiconductor device includes a substrate, a first electrode and a second electrode. The semiconductor device includes a MOSFET that has the first electrode as a drain electrode and the second electrode as a source electrode. The first electrode has a layer region provided on a first main surface and a first region extending from the first main surface into the substrate in a first direction from the first electrode to the second electrode. A lower surface of the first electrode protrudes in a direction opposite to the first direction.

The present disclosure provides a packaging device and a method to form the packaging device. The packaging device includes a package base, a die structure disposed over the package base, and a package lid over the die structure. The package lid is thermally coupled with the die structure and the package base.