Patent classifications
H10W74/111
INTERCONNECT SUBSTRATE AND METHOD OF MAKING THE SAME
An interconnect substrate includes a core layer, a first interconnect layer formed on a first surface of the core layer, a second interconnect layer formed on a second surface of the core layer, a cavity extending through the core layer, an electronic component in the cavity, a first insulating layer covering the electronic component and covering side surfaces, without covering an upper surface, of the first interconnect layer, and a second insulating layer covering the upper surface of the first interconnect layer and an upper surface of the first insulating layer, wherein the first insulating layer has a recess over the cavity recessed relative to the upper surface of the first insulating layer, a deepest part of the recess is located between a plane including the first surface and a plane including the upper surface of the first interconnect layer, and the second insulating layer fills the recess.
HIGH DIE STACK PACKAGE WITH MODULAR STRUCTURE
Systems, devices, and methods for high die stack packages with modular structures are provided herein. A die stack package can include a substrate, a proximal unit carried by the substrate, and a distal unit carried by the proximal unit. The proximal unit can include first and second proximal die stacks, a proximal portion of a modular structure, and proximal wire bonds electrically coupling the first and second proximal die stacks to conducting elements of the modular structure. The distal unit can include first and second distal die stacks, a distal portion of the modular structure, and distal wire bonds electrically coupling the first and second distal die stacks to the conducting elements of the modular structure. In some embodiments, the die stack package further includes one or more modular units stacked between the proximal unit and the distal unit.
SEMICONDUCTOR PACKAGES USING PACKAGE IN PACKAGE SYSTEMS AND RELATED METHODS
Implementations of a semiconductor package may include two or more die, each of the two more die coupled to a metal layer at a drain of each of the two more die, the two or more die and each metal layer arranged in two parallel planes; a first interconnect layer coupled at a source of each of the two more die; a second interconnect layer coupled to a gate of each of the two or more die and to a gate package contact through one or more vias; and an encapsulant that encapsulates the two or more die and at least a portion of the first interconnect layer, each metal layer, and the second interconnect layer.
ELECTRONIC DEVICE
An electronic device includes a circuit structure, a first electronic unit and an encapsulation layer. The first electronic unit is disposed on the circuit structure. The encapsulation layer surrounds the first electronic unit. The circuit structure includes at least one first insulating layer and at least one second insulating layer. The at least one first insulating layer is disposed between the first electronic unit and the at least one second insulating layer. A stiffness of the at least one first insulating layer is less than a stiffness of the at least one second insulating layer.
COMPOSITE COMPONENT
A composite component containing one or more electronic components. The composite component includes a Si base layer having a first main surface, and a second main surface facing the first main surface, a redistribution layer disposed on the first main surface, a through-Si via extending through the Si base layer and the adhesive layer to electrically connect the redistribution layer and the electronic component, and extending through the Si base layer, an electronic component electrically connected to the through-Si via, and disposed on the second main surface, sidewall portions surrounding the electronic component, and disposed to form a recessed portion together with the Si base layer, and a resin sealing portion sealing the electronic component.
Package structure with at least two dies and at least one spacer
A package structure includes a leadframe, at least two dies, at least one spacer and a plastic package material. The leadframe includes a die pad. The dies are disposed on the die pad of the leadframe. The spacer is disposed between at least one of the dies and the die pad. The plastic package material is disposed on the leadframe, and covers the dies. A first minimum spacing distance is between one of a plurality of edges of the spacer and one of a plurality of edges of the die pad, a second minimum spacing distance is between one of a plurality of edges of the dies and one of the edges of the die pad, and the first minimum spacing distance is larger than the second minimum spacing distance.
Method of coupling semiconductor dice and corresponding semiconductor device
An encapsulation of laser direct structuring (LDS) material is molded onto a substrate having first and second semiconductor dice arranged thereon. Laser beam energy is applied to a surface of the encapsulation of LDS material to structure therein die vias extending through the LDS material to the first and second semiconductor dice and a die-to-die line extending at surface of the LDS material between die vias. Laser-induced forward transfer (LIFT) processing is applied to transfer electrically conductive material to the die vias and the die-to-die line extending between die vias. A layer of electrically conductive material electroless grown onto the die vias and the die-to-die line facilitates improved adhesion of the electrically conductive material transferred via LIFT processing.
Semiconductor device and method of manufacturing the same
Reliability of a semiconductor device is improved. The semiconductor device includes a clip which is electrically connected to a main-transistor source pad via a first silver paste and is connected to a lead via a second silver paste. The clip has a first part with which the first silver paste is in contact, a second part with which the second silver paste is in contact, and a third part positioned between the first part and the second part. A protruding member is formed on a surface of the main-transistor source pad, and the first part is in contact with the protruding member.
Semiconductor device with resin bleed control structure and method therefor
A method of manufacturing a semiconductor device is provided. The method includes forming a package leadframe including a die pad, a first ridge formed at a first outer edge of the die pad, a second ridge formed at a second outer edge of the die pad opposite of the first outer edge and separate from the first ridge, and a plurality of leads surrounding the die pad. A semiconductor die is attached to the die pad by way of a die attach material. The semiconductor die is located on the die pad between the first ridge and the second ridge. An encapsulant encapsulates the semiconductor die and at least a portion of the package leadframe.
Semiconductor device
A semiconductor device includes: a baseplate; an insulating substrate on the baseplate; a semiconductor element on the insulating substrate; a case bonded to the baseplate by an adhesive, the case surrounding a space in which the semiconductor element is positioned; and an encapsulating material filling the space surrounded by the case, in which, the case includes a claw, the claw includes: a protrusion protruding from an inner wall surface of the case; and a hook inclined from the protrusion, a space being sandwiched between the hook and the inner wall surface of the case.