A dicing method including the steps of: bonding a first wafer having a first wafer resistivity and a second wafer having a second wafer resistivity higher than the wafer first resistivity, thereby forming a bonded wafer; irradiating the bonded wafer with a laser while varying focal lengths in a thickness direction of the bonded wafer, thereby forming a plurality of modified regions along a dicing line; and dicing the bonded wafer along the dicing line by performing an expansion process on the bonded wafer formed with the modified regions.

An integrated circuit chip includes; a package substrate including a first signal ball, a first semiconductor chip on the package substrate, a second semiconductor chip on the first semiconductor chip, a first bump disposed between the package substrate and the first semiconductor chip and electrically connected to the first signal ball, and a second bump disposed between the first semiconductor chip and the second semiconductor chip and electrically connected to the first signal ball, wherein during a first mode, the first signal ball receives a signal from the first semiconductor chip through the first bump and receives a signal from the second semiconductor chip through the second bump.

A shower plate that includes a plate-like member provided at a top of a processing chamber is provided. The shower plate has first holes communicating with a first flow path in the shower plate. The shower plate includes first chamber valves provided with the respective first holes. The shower plate has second holes communicating with a second flow path in the shower plate. The shower plate includes second chamber valves provided with the respective second holes. The shower plate has third holes provided in the plate-like member to correspond to the first holes and the second holes. The shower plate includes third chamber valves provided with the respective third holes. The first chamber valves, the second chamber valves, and the third chamber valves are piezoelectric elements.

A package structure according to the present disclosure includes a bottom substrate, a bottom interconnect structure over the bottom substrate, a top interconnect structure disposed over the bottom interconnect structure and including a metal feature, a top substrate over the top interconnect structure, and a protective film disposed on the top substrate. The protective film includes an interfacial layer on the top substrate, at least one dipole-inducing layer on the interfacial layer, a moisture block layer on the at least one dipole-inducing layer, and a silicon oxide layer over the moisture block layer. The at least one dipole-inducing layer includes aluminum oxide, titanium oxide or zirconium oxide.

An electronic package is provided in which an electronic structure is bonded onto a carrier structure via a plurality of conductive elements, where each of the conductive elements is connected to a single contact of the electronic structure via a plurality of conductive pillars. Therefore, when one of the conductive pillars fails, each of the conductive elements can still be electrically connected to the contact via the other of the conductive pillars to increase electrical conductivity.

In a described example, an apparatus includes: a package substrate with conductive leads; a semiconductor die mounted to the package substrate, the semiconductor die having a first thickness; electrical connections coupling bond pads on the semiconductor die to conductive leads on the package substrate; brackets attached to the package substrate spaced from the semiconductor die and extending away from the package substrate to a distance from the package substrate that is greater than the first thickness of the semiconductor die; and mold compound covering the package substrate, the semiconductor die, the brackets, and the semiconductor die to form a semiconductor device package having a board side surface and a top surface opposite the board side surface, and having portions of the brackets exposed from the mold compound on the top surface of the semiconductor device package to form mounts for a passive component.

Implementations of a semiconductor package may include a semiconductor die including a first side and a second side, the first side of the semiconductor die including one or more electrical contacts; and an organic material covering at least the first side of the semiconductor die. Implementations may include where the one or more electrical contacts extend through one or more openings in the organic material; a metal-containing layer coupled to the one or more electrical contacts; and one or more slugs coupled to one of a first side of the semiconductor die, a second side of the semiconductor die, or both the first side of the semiconductor die and the second side of the semiconductor die.

A power semiconductor device according to the present invention is provided with: a first circuit body constituting an upper arm of an inverter circuit for converting a DC current into an AC current; a second circuit body constituting a lower arm of the inverter circuit; and a circuit board that has therein a through-hole in which the first circuit body and the second circuit body are disposed and that has an intermediate board between the first circuit body and the second circuit body. The intermediate board has an AC wiring pattern for transmitting the AC current, and the first circuit body and the second circuit body are connected to the AC wiring pattern so as to be in surface contact with the AC wiring pattern.

A molded package includes: a semiconductor die; a substrate attached to a bottom side of the semiconductor die; an electrically conductive clip attached to a top side of the semiconductor die; and a mold compound encapsulating the semiconductor die. A top side of the electrically conductive clip faces away from the semiconductor die and has an exposed flat surface that overlays the semiconductor die and is not covered by the mold compound. A bottom side of the electrically conductive clip faces the semiconductor die and has a convex curved surface that is attached to the top side of the semiconductor die. Along a vertical cross-section of the electrically conductive clip from the exposed flat surface to the convex curved surface, the electrically conductive clip has a plano-convex shape delimited by the exposed flat surface and the convex curved surface. A method of producing the molded package is also described.

A system includes: an inverter configured to convert DC power to AC power, wherein the inverter includes: a power module including: a first substrate, a second substrate including a source plane and a gate plane separated from the source plane by a full trench, the source plane including a step trench, and the gate plane including an electrical connection through the second substrate to a gate input connection of the power module, a semiconductor die disposed between the first substrate and the second substrate, the step trench formed in a portion of the source plane corresponding to an edge of the semiconductor die, and the semiconductor die including a gate connected to the gate plane, and a sinter element disposed between the semiconductor die and the second substrate to connect the semiconductor die to the second substrate; a battery; and a motor.