H10W70/655

Package structure and method of forming the same

A package structure and method of forming the same are provided. The package structure includes a die, a through via, an encapsulant, an adhesion promoter layer, an insulating layer and a polymer layer. The through via is laterally aside the die. The encapsulant laterally encapsulates the die and the a through via. The adhesion promoter layer and an insulating layer are sandwiched between the a through via and the encapsulant. Sidewalls of the a through via are covered by the adhesion promoter layer and the insulating layer. The polymer layer is located under the through via and encapsulant. The insulating layer includes a plurality of portions.

Wafer level fan out semiconductor device and manufacturing method thereof

A wafer level fan out semiconductor device and a manufacturing method thereof are provided. A first sealing part is formed on lateral surfaces of a semiconductor die. A plurality of redistribution layers are formed on surfaces of the semiconductor die and the first sealing part, and solder balls are attached to the redistribution layers. The solder balls are arrayed on the semiconductor die and the first sealing part. In addition, a second sealing part is formed on the semiconductor die, the first sealing part and lower portions of the solder balls. The solder balls are exposed to the outside through the second sealing part. Since the first sealing part and the second sealing part are formed of materials having thermal expansion coefficients which are the same as or similar to each other, warpage occurring to the wafer level fan out semiconductor device can be suppressed.