Patent classifications
H10P72/7402
DRY ADHESIVE FOR TEMPORARY BONDING OF SEMICONDUCTOR DEVICES
A dry adhesive microfiber array comprising a plurality of fibers with enlarged tips, where the dry adhesive is capable of adhering to a surface of a silicon wafer and/or carrier, in which the dry adhesive can be debonded without the use of chemicals or heat and does not leave a residue on the surface of the wafer, and, a liquid can be introduced to the interface between the dry adhesive and semiconductor device to adjust the force of adhesion.
Polysiloxane-containing temporary adhesive comprising heat-resistant polymerization inhibitor
A temporary adhesive without the formation of voids between a support and a wafer. A temporary adhesive for separatably attaching a support to a circuit side of a wafer to process a rear surface of the wafer, the temporary adhesive including a component (A) that is cured by a hydrosilylation reaction; a polymerization inhibitor (B) having a 5% mass decrease temperature of 80 C. or higher as measured using a Tg-DTA; and a solvent (C). The component (A) may include a polysiloxane (A1) including a polyorganosiloxane (a1) containing a C.sub.1-10 alkyl group and a C.sub.2-10 alkenyl group, and a polyorganosiloxane (a2) containing a C.sub.1-10 alkyl group and a hydrogen atom; and a platinum group metal-based catalyst (A2). The polymerization inhibitor (B) may be a compound of formula (1): ##STR00001##
(wherein R.sup.7 and R.sup.8 are each a C.sub.6-40 aryl group, or a combination of a C.sub.1-10 alkyl group and a C.sub.6-40 aryl group).
Tape sticking system, tape sticking method, tape peeling system, and tape peeling method
The present invention relates to a tape sticking system for sticking a protective tape for protecting a peripheral portion of a substrate, such as a wafer. The tape sticking apparatus (10) includes a substrate holder (21) for sticking, a side roller (43), a first roller (46), a second roller (47), a roller-driving motor (49) coupled to the second roller (47), and a nipping mechanism (60) for nipping the peripheral portion of the substrate (W) with the first roller (46) and the second roller (47). The tape sticking apparatus (10) is configured to cause the second roller (47) to be rotated by use of the roller-driving motor (49) while nipping the peripheral portion of the substrate, held to the substrate holder (21) for sticking, with the first roller (46) and the second roller (47), to thereby rotate the substrate.
Silicon fragment defect reduction in grinding process
A method is provided for fabricating a semiconductor wafer having a device side, a back side opposite the device side and an outer periphery edge. Suitably, the method includes: forming a top conducting layer on the device side of the semiconductor wafer; forming a passivation layer over the top conducting layer, the passivation layer being formed so as not to extend to the outer periphery edge of the semiconductor wafer; and forming a protective layer over the passivation layer, the protective layer being spin coated over the passivation layer so as to have a smooth top surface at least in a region proximate to the outer periphery edge of the semiconductor wafer.
Carbon assisted semiconductor dicing and method
A semiconductor substrate is configured for dicing into separate die or individual semiconductor devices. The semiconductor substrate can comprise silicon, silicon carbide, or gallium nitride. A dicing grid bounds each semiconductor device on the semiconductor substrate. A die singulation process is configured to occur in the dicing grid. Material is coupled to the dicing grid. In one embodiment, the material can comprise carbon. A laser is configured to couple energy to the material coupled to the dicing grid. The energy from the laser heats the material. The heat from the material or the temperature differential between the material and the dicing creates a thermal shock that generates a vertical fracture in the semiconductor substrate that separates the semiconductor device from the remaining semiconductor substrate.
Cutting apparatus
A cutting apparatus for dividing a wafer that is stuck to an adhesive tape in which the adhesive layer is cured by ultraviolet light and that is supported by an annular frame through the adhesive tape, into individual chips, includes: a holding unit having a frame support section that supports the annular frame, and a wafer table that is formed of a transparent body and supports the wafer; a cutting unit including, in a rotatable manner, a cutting blade for cutting the wafer; and an ultraviolet light applying unit that applies ultraviolet light, the ultraviolet light applying unit being disposed facing the cutting blade in such a manner that the wafer table is interposed therebetween. The ultraviolet light applying unit applies ultraviolet light to a region where the wafer is to be cut by the cutting blade, to form a cured region where the adhesive layer is cured.
Method and treatment system for uniform processing of semiconductor devices
A method includes attaching a carrier to a semiconductor wafer using a release film; removing the carrier from the semiconductor wafer; and performing a treatment process to remove the release film from the semiconductor wafer, the treatment process comprising: flowing an etchant through a diffusion plate within a treatment chamber, the diffusion plate comprising concentric rings separated by dividers, the concentric rings comprising a first concentric ring of holes, a second concentric ring of holes, and a third concentric ring of holes, each of the concentric rings having a different hole density; and performing a cleaning process on the semiconductor wafer.
SEMICONDUCTOR SUBSTRATE INCLUDING SEMICONDUCTOR CHIP
A semiconductor substrate including a front side and a backside and including a good die region having a plurality of semiconductor chips, a dummy die region having a plurality of dummy chips in an arc shape along an outer portion of the good die region, a plurality of first bump pads at a first interval on the backside of each of the plurality of semiconductor chips, and a plurality of second bump pads at a second interval on the backside of at least one of the plurality of dummy chips. The second interval is smaller than the first interval. The plurality of first bump pads are in a first matrix arrangement and the plurality of second bump pads are alternately arranged in a second matrix arrangement, the second matrix arrangement including both the first matrix arrangement and the first matrix arrangement shifted by a desired distance in a horizontal direction.
SEMICONDUCTOR ELEMENTS WITH HYBRID BONDING LAYERS
A microelectronic interconnect structure having a pre-formed hybrid bonding layer is disclosed. The hybrid bonding layer is formed over a temporary carrier comprising a substantially flat upper surface. A routing structure comprising a device or metallization layers is then provided over the hybrid bonding layer. After the hybrid bonding layer coupled with the routing structure is properly reinforced, the temporary carrier is removed to reveal a bonding surface of the hybrid bonding layer. The interconnect structure can comprise an organic dielectric material interspersing the hybrid bonding layer and forming part of the routing structure, and as such exhibit bending flexibility.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes cutting a substrate structure along a scribe lane to separate a plurality of semiconductor devices from the substrate structure. The substrate structure includes a plurality of device regions and the scribe lane separates the plurality of device regions. Each of the plurality of device regions includes a first side and a second side opposite the first side. Each of the plurality of device regions includes bonding pads arranged along the first side, and bonding pads are absent on a region adjacent to the second side. The plurality of device regions are arranged such that the first side and the second side of adjacent device regions face each other and the scribe lane is therebetween in the substrate structure. The substrate structure further includes metal patterns arranged closer to the second side than to the first side in the scribe lane.