Patent classifications
H10W72/321
SEMICONDUCTOR PACKAGE
A semiconductor package may include a first semiconductor chip, second semiconductor chips stacked on the first semiconductor chip in a vertical direction, adhesive layers interposed between the first semiconductor chip and one of the second semiconductor chips and between the second semiconductor chips, and a molding member on the first semiconductor chip. Edges of the adhesive layers may be positioned inward from sidewalls of the second semiconductor chips. The molding member may cover at least sidewalls of the second semiconductor chips and sidewalls of the adhesive layers. The molding member may fill edge gaps defined by the sidewalls of the adhesive layers and edges of upper surfaces and lower surfaces of the second semiconductor chips.
ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME
An electronic device includes: a first substrate; an element layer disposed on the first substrate and including an active area and a peripheral area surrounding the active area; a first bonding pad disposed on the peripheral area of the element layer; a second substrate disposed opposite to the first substrate; a second bonding pad disposed on the second substrate and including a first part and a second part surrounding the first part; and a bonding material disposed between the first part of the second bonding pad and the first bonding pad and between the second part of the second bonding pad and the first bonding pad.
SEMICONDUCTOR PACKAGE
A semiconductor package includes a base chip including a semiconductor body and a through-electrode structure penetrating through the semiconductor body and having a protrusion portion protruding upwardly of the semiconductor body, an insulating pattern on a side surface and an upper surface of the base chip, a chip stack on the base chip and the insulating pattern, and an encapsulant on the insulating pattern and covering at least a portion of the chip stack. The insulating pattern includes a first insulating portion on a side surface of the semiconductor body, and a second insulating portion on an upper surface of the semiconductor body and covering a side surface of the protrusion portion of the through-electrode structure. The insulating pattern includes an inorganic insulating material, and the encapsulant includes an organic insulating material.
Display device using micro-LEDs and method for manufacturing same
The present specification provides a display device using semiconductor light-emitting diodes which are self-assembled in fluid, and a method for manufacturing same. Specifically, the semiconductor light-emitting diode comprises: a first-conductive-type electrode layer and a second-conductive-type electrode layer; a first-conductive-type semiconductor layer electrically connected to the first-conductive-type electrode layer; an active layer provided on the first-conductive-type semiconductor layer; and a second-conductive-type semiconductor layer provided on the active layer and electrically connected to the second-conductive-type electrode layer, wherein one surface of the second-conductive-type semiconductor layer comprises a mesa structure formed by etching a portion of the one surface, and the second-conductive-type electrode layer is provided on the one surface comprising the mesa structure of the second-conductive-type semiconductor layer.
Semiconductor device and semiconductor device manufacturing method
According to one embodiment, a semiconductor device includes: a circuit board; a first semiconductor chip mounted on a face of the circuit board; a resin film covering the first semiconductor chip; and a second semiconductor chip having a chip area larger than a chip area of the first semiconductor chip, the second semiconductor chip being stuck to an upper face of the resin film and mounted on the circuit board. The resin film entirely fits within an inner region of a bottom face of the second semiconductor chip when viewed in a stacking direction of the first and second semiconductor chips.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor element portion that includes a semiconductor element, a first wiring portion that is on a first surface of the semiconductor element portion, a support substrate that is on the first wiring portion, a bonding layer that is between the first wiring portion and the support substrate, and a second wiring portion that is on a second surface of the semiconductor element portion opposite to the first surface of the semiconductor element portion. The bonding layer includes a pattern layer. The pattern layer includes a first pattern that includes an insulating material and a second pattern that has a thermal conductivity greater than a thermal conductivity of the first pattern and is electrically insulated from the first wiring portion.
POLYIMIDE DIE SUBSTRATE
In examples, a semiconductor package comprises a semiconductor die having a device side including circuitry and a non-device side opposing the device side. The semiconductor package comprises a polyimide substrate coupled to the non-device side of the semiconductor die by an adhesive layer. The semiconductor package comprises a conductive terminal coupled to the polyimide substrate by the adhesive layer, and a bond wire coupled to the device side of the semiconductor die and to the conductive terminal. The semiconductor package comprises a mold compound covering the semiconductor die, the polyimide substrate, the bond wire, and at least part of the conductive terminal, with the conductive terminal extending to an exterior of the mold compound.
Display device using micro LED, and manufacturing method therefor
Provided in the present specification is a novel structured semiconductor light-emitting element capable of preventing an electrode forming failure due to an arrangement error occurring during assembly or transfer of semiconductor light-emitting elements on a substrate, when a display device is implemented using the semiconductor light-emitting elements, wherein at least one of a plurality of semiconductor light-emitting elements according to one embodiment of the present disclosure comprises: a first conductive type semiconductor layer; a second conductive type semiconductor layer located on the first conductive type semiconductor layer; an active layer arranged between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a second conductive type electrode located on the second conductive type semiconductor layer; and a first conductive type electrode located on at least a one-side stepped portion of the first conductive type semiconductor layer exposed by etching a portion of the second conductive type semiconductor layer and the active layer.
Semiconductor device assembly substrates with tunneled interconnects, and methods for making the same
A semiconductor device assembly is provided. The assembly includes a package substrate which has a tunneled interconnect structure. The tunneled interconnect structure has a solder-wettable surface, an interior cavity, and at least one microvia extending from the surface to the cavity. The assembly further includes a semiconductor device disposed over the substrate and a solder joint coupling the device and the substrate. The joint comprises the solder between the semiconductor device and the interconnect structure, which includes the solder on the surface, the solder in the microvia, and the solder within the interior cavity.
Electronic device and method for manufacturing electronic device
An electronic device which can suppress peeling off and damaging of the bonding material is provided. The electronic device includes an electronic component, a mounting portion, and a bonding material. The electronic component has an element front surface and an element back surface separated in the z-direction. The mounting portion has a mounting surface opposed to the element back surface on which the electronic component is mounted. The bonding material bonds the electronic component to the mounting portion. The bonding material includes a base portion and a fillet portion. The base portion is held between the electronic component and the mounting portion in the z-direction. The fillet portion is connected to the base portion and is formed outside the electronic component when seen in the z-direction. The electronic component includes two element lateral surface and ridges. The ridges are intersections of the two element lateral surface and extend in the z-direction. The fillet portion includes a ridge cover portion which covers at least a part of the ridges.