A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device comprises an active cell area including a plurality of superjunction trench power MOSFETs formed in an epitaxial layer. Each MOSFET includes source and body regions and a contact trench formed between first and second gate trenches. A region of the epitaxial layer between the gate trenches extends to the top surface of the epitaxial layer. An insulated gate electrode is formed in each gate trench. At least a portion of the contact trench extends from a top surface of the epitaxial layer to a depth that is shallower than the bottom of the body region.

According to one embodiment, a semiconductor device includes a semiconductor layer including a source area, a drain area and a channel area, a first insulating layer, an etching stopper layer located immediately above the channel area and being thinner than the first insulating layer, a second insulating layer provided on the etching stopper layer and being thicker than the first insulating layer, a gate electrode, a third insulating layer which covers the etching stopper layer, the second insulating layer and the gate electrode and covers the first insulating layer immediately above the source area and immediately above the drain area, a source electrode in contact with the source area, and a drain electrode in contact with the drain area.

According to one embodiment, a semiconductor device includes a semiconductor layer including a source area, a drain area and a channel area, a first insulating layer, an etching stopper layer located immediately above the channel area and being thinner than the first insulating layer, a second insulating layer provided on the etching stopper layer and being thicker than the first insulating layer, a gate electrode, a third insulating layer which covers the etching stopper layer, the second insulating layer and the gate electrode and covers the first insulating layer immediately above the source area and immediately above the drain area, a source electrode in contact with the source area, and a drain electrode in contact with the drain area.

A semiconductor device includes: a semiconductor substrate having an active device region that includes a plurality of device cells and a termination region between the active device region and an edge of the semiconductor substrate; a field termination structure in the termination region and including a continuous region of a first conductivity type and a plurality of rings of the first conductivity type in the continuous region and having a higher average doping concentration than the continuous region; and a charge balance structure in the active device region and including interleaved columns of the first conductivity type and of a second conductivity type opposite the first conductivity type. The charge balance structure extends into the termination region below the field termination structure such that at least an outermost one of the columns of the first conductivity type is connected to the continuous region of the field termination structure.

A method for manufacturing a semiconductor device according to an embodiment includes forming a first mask material having a first opening on a surface of a silicon carbide layer, performing first ion implantation of forming a first carbon region by implanting carbon (C) into the silicon carbide layer using the first mask material as a mask, forming, on the surface of the silicon carbide layer, a second mask material in which both end portions in a first direction parallel to the surface have second openings disposed inside both end portions in the first direction of the first carbon region, performing second ion implantation of forming a first impurity region by implanting a first impurity into the silicon carbide layer using the second mask material as a mask, and performing heat treatment at 1600 C. or higher.

A method for manufacturing a semiconductor device according to an embodiment includes forming a first mask material having a first opening on a surface of a silicon carbide layer, performing first ion implantation of forming a first carbon region by implanting carbon (C) into the silicon carbide layer using the first mask material as a mask, forming, on the surface of the silicon carbide layer, a second mask material in which both end portions in a first direction parallel to the surface have second openings disposed inside both end portions in the first direction of the first carbon region, performing second ion implantation of forming a first impurity region by implanting a first impurity into the silicon carbide layer using the second mask material as a mask, and performing heat treatment at 1600 C. or higher.

A semiconductor device according to an embodiment includes a silicon carbide layer, a silicon oxide layer having a peak frequency of a longitudinal wave optical mode of 1245 cm.sup.1 or more at a position 0.5 nm away from the silicon carbide layer, and a region located between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration of 110.sup.21 cm.sup.3 or more. The concentration distribution of nitrogen in the silicon carbide layer, the silicon oxide layer, and the region has a peak in the region.

A semiconductor device according to an embodiment includes a silicon carbide layer, a silicon oxide layer having a peak frequency of a longitudinal wave optical mode of 1245 cm.sup.1 or more at a position 0.5 nm away from the silicon carbide layer, and a region located between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration of 110.sup.21 cm.sup.3 or more. The concentration distribution of nitrogen in the silicon carbide layer, the silicon oxide layer, and the region has a peak in the region.

In an embodiment, a method may include forming a multi-layer stack over a substrate. The multi-layer stack has alternating layers of first semiconductor layers and second semiconductor layers. The method may also include removing the first semiconductor layers. Furthermore, the method may include forming a disposable material between the second semiconductor layers. In addition, the method may include performing a first implantation process on the disposable material and the second semiconductor layers. Moreover, the method may include forming source/drain regions adjacent to the second semiconductor layers and the disposable material. The method may also include replacing the disposable material with a metal gate structure.

In an embodiment, a method may include forming a multi-layer stack over a substrate. The multi-layer stack has alternating layers of first semiconductor layers and second semiconductor layers. The method may also include removing the first semiconductor layers. Furthermore, the method may include forming a disposable material between the second semiconductor layers. In addition, the method may include performing a first implantation process on the disposable material and the second semiconductor layers. Moreover, the method may include forming source/drain regions adjacent to the second semiconductor layers and the disposable material. The method may also include replacing the disposable material with a metal gate structure.