Disclosed is a semiconductor device and semiconductor fabrication method. A semiconductor device includes: a gate structure over a semiconductor substrate, having a low-k dielectric layer, a high-k dielectric layer, a p-type work function metal layer, an n-type work function metal layer, a silicon oxide scap layer, and a glue layer; and a continuous tungsten (W) cap over the gate structure that was formed by the gate structure being pretreated, W material being deposited and etched back, the scap layer being etched, additional W material being deposited, and unwanted W material being removed. A semiconductor fabrication method includes: receiving a gate structure; pretreating the gate structure; depositing W material on the gate structure; etching back the W material; etching the scap layer; depositing additional W material; and removing unwanted W material.

A method includes forming a first gate dielectric and a second gate dielectric over a first semiconductor region and a second semiconductor region, respective, forming a first work-function layer comprising a first portion and a second portion over the first gate dielectric and the second gate dielectric, respectively, patterning the first work-function layer to remove the second portion of the first work-function layer, and forming a second work-function layer comprising a first portion and a second portion over the first gate dielectric and the second gate dielectric, respectively. The method further includes performing an etching process to etch the second work-function layer and a part of the first portion of the first work-function layer to form an opening, and depositing a conductive layer over the second work-function layer. The conductive layer is filled into the opening.

The present disclosure provides a semiconductor structure comprising one or more fins formed on a substrate and extending along a first direction; one or more gates formed on the one or more fins and extending along a second direction substantially perpendicular to the first direction, the one or more gates including an first isolation gate and at least one functional gate; source/drain features formed on two sides of each of the one or more gates; an interlayer dielectric (ILD) layer formed on the source/drain features and forming a coplanar top surface with the first isolation gate. A first height of the first isolation gate is greater than a second height of each of the at least one functional gate.

The present invention relates to a substrate processing method, and more particularly, to a processing method for substrate for removing impurities from inside a thin film of a substrate and improving characteristics of the thin film.

The present invention relates to a substrate processing method, and more particularly, to a processing method for substrate for removing impurities from inside a thin film of a substrate and improving characteristics of the thin film.

The present invention provides a preferentially orientated electrode film and preparation methods thereof, relating to the technical field of thin film preparation, comprising a silicon-based substrate and a primary seed layer, a secondary seed layer and a bottom electrode layer grown sequentially on said substrate; said primary seed layer being an A.sub.xB.sub.1-xN film or an A.sub.3-xB.sub.1-xN film, wherein ACu, Fe; BPd, Pt; Ox1; in which said secondary seed layer is made of one or more of the following films: chromium nitride film, titanium nitride film, tantalum nitride film, magnesium oxide film; and said bottom electrode layer is made of one or more of the following films: a platinum film, a titanium nitride film, a gold film, a strontium ruthenate film, or a niobium doped strontium titanate film, which has a preferential orientation in the (00/) crystallographic direction, to solve the problem that the existing films with (00/) preferential orientations are not obtainable on a Silicon based substrate.

Disclosed is a semiconductor device and semiconductor fabrication method. A semiconductor device includes: a gate structure over a semiconductor substrate, having a low-k dielectric layer, a high-k dielectric layer, a p-type work function metal layer, an n-type work function metal layer, a silicon oxide scap layer, and a glue layer; and a continuous tungsten (W) cap over the gate structure that was formed by the gate structure being pretreated, W material being deposited and etched back, the scap layer being etched, additional W material being deposited, and unwanted W material being removed. A semiconductor fabrication method includes: receiving a gate structure; pretreating the gate structure; depositing W material on the gate structure; etching back the W material; etching the scap layer; depositing additional W material; and removing unwanted W material.

A method for making a semiconductor device may include forming a superlattice gettering layer on a substrate. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming a memory device above the superlattice gettering layer including a metal induced crystallization (MIC) channel adjacent the semiconductor substrate, and a gate associated with the MIC channel. The superlattice gettering layer may further include gettered metal particles from the MIC channel.