H10P50/642

Nitride-containing STI liner for SIGE channel

A semiconductor device includes a fin structure that protrudes vertically out of a substrate, wherein the fin structure contains silicon germanium (SiGe). An epi-silicon layer is disposed on a sidewall of the fin structure. The epi-silicon layer contains nitrogen. One or more dielectric liner layers are disposed on the epi-silicon layer. A dielectric isolation structure is disposed over the one or more dielectric liner layers.

Substrate processing apparatus and substrate processing method
12516242 · 2026-01-06 · ·

A substrate processing apparatus includes a substrate processing unit and a controller. The substrate processing unit is configured to perform an etching processing on one or more substrates each having a silicon nitride film and a silicon oxide film on a surface thereof with a processing liquid containing a phosphoric acid aqueous solution and a silicic acid compound. The controller is configured to control individual components of the substrate processing apparatus. The controller includes a concentration control unit configured to control a phosphoric acid concentration of the processing liquid such that etching selectivity of the silicon nitride film with respect to the silicon oxide film falls within a given range from a beginning of the etching processing to an end thereof.

Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width
12520519 · 2026-01-06 · ·

Semiconductor devices having necked semiconductor bodies and methods of forming semiconductor bodies of varying width are described. For example, a semiconductor device includes a semiconductor body disposed above a substrate. A gate electrode stack is disposed over a portion of the semiconductor body to define a channel region in the semiconductor body under the gate electrode stack. Source and drain regions are defined in the semiconductor body on either side of the gate electrode stack. Sidewall spacers are disposed adjacent to the gate electrode stack and over only a portion of the source and drain regions. The portion of the source and drain regions under the sidewall spacers has a height and a width greater than a height and a width of the channel region of the semiconductor body.

SELECTIVE REMOVAL OF SEMICONDUCTOR FINS
20260013208 · 2026-01-08 ·

An array of semiconductor fins is formed on a top surface of a substrate. A dielectric material liner is formed on the surfaces of the array of semiconductor fins. A photoresist layer is applied and patterned such that sidewalls of an opening in the photoresist layer are parallel to the lengthwise direction of the semiconductor fins, and are asymmetrically laterally offset from a lengthwise direction passing through the center of mass of a semiconductor fin to be subsequently removed. An angled ion implantation is performed to convert a top portion of dielectric material liner into a compound material portion. The compound material portion is removed selective to the remaining dielectric material liner, and the physically exposed semiconductor fin can be removed by an etch or converted into a dielectric material portion by a conversion process. The dielectric material liner can be removed after removal of the semiconductor fin.

ETCHING COMPOSITION, METHOD FOR MANUFACTURING ETCHING COMPOSITION, ETCHING METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING GATE-ALL-AROUND TRANSISTOR

An etching composition containing a semiclathrate hydrate-forming compound (A), wherein the compound (A) comprises a compound having a melting point of 5 C. or higher when the compound (A) is made into an aqueous solution having a concentration of 1 mol/L, the etching composition has an oxygen concentration of 2 ppm by mass or less, and the etching composition has a mass ratio of oxygen to the compound (A) of from 110.sup.8 to 110.sup.4.

Use of a composition and a process for selectively etching silicon

Described herein is a method of using a composition for selectively etching a silicon layer in the presence of a layer including a silicon germanium alloy, the composition including: (a) 4 to 15% by weight of an amine of formula (E1), and (b) water, where X.sup.E1, X.sup.E2, and X.sup.E3 are independently selected from a chemical bond and C.sub.1-C.sub.6 alkanediyl; Y.sup.E is selected from N, CR.sup.E1, and P; R.sup.E1 is selected from H and C.sub.1-C.sub.6 alkyl.

Apparatus for treating substrate and method for treating substrate

The inventive concept provides a substrate treating apparatus. The substrate treating apparatus includes a support unit horizontally maintaining a substrate; a laser irradiation unit for irradiating the substrate with a laser; a photo-detector for detecting an energy of a reflective light reflected from the substrate among a laser irradiated on the substrate; and a processor, and wherein the processor irradiates a first laser of a first output to the substrate, and sets a second output of a second laser for irradiating the substrate to heat the substrate, based on an energy of a first reflective light reflected from the substrate by the first laser detected from the photo-detector.

METHODS OF PROCESSING SEMICONDUCTOR-ON-INSULATOR STRUCTURES USING CLEAN-AND-ETCH OPERATION

A method of preparing a semiconductor-on-insulator structure from a bonded structure including a handle substrate, a donor substrate including a cleave plane, and a dielectric layer positioned between the handle substrate and the donor substrate, the method includes cleaving the bonded structure at the cleave plane to form a cleaved structure including the handle substrate, the dielectric layer, and a device layer. The single crystal semiconductor device layer defines a damaged region at an exposed surface opposite the dielectric layer. The damaged region includes single crystal semiconductor material and extends a thickness from the exposed surface. The method also includes removing the damaged region from the cleaved structure using a clean-and-etch operation that includes contacting the exposed surface of the device layer with an alkaline solution at a temperature and for a duration sufficient to remove the damaged region and smoothing the device layer with the damaged region removed.

Substrate processing apparatus and substrate processing method
12529149 · 2026-01-20 · ·

A substrate processing apparatus includes a substrate processing unit for processing a substrate by discharging a chemical liquid to the substrate; a chemical storage unit connected to the substrate processing unit by a chemical liquid supply line and a chemical liquid recovery line; and a liquid replenishment unit including an evaporation measurement member for measuring the amount of evaporation of water contained in the chemical liquid, and a water supply member for supplying water to the chemical liquid.

Gate-all-around structure and methods of forming the same

Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method comprises forming a fin over a substrate, wherein the fin comprises a first semiconductor layer and a second semiconductor layer including different semiconductor materials, and the fin comprises a channel region and a source/drain region; forming a dummy gate structure over the channel region of the fin and over the substrate; etching a portion of the fin in the source/drain region to form a trench therein, wherein a bottom surface of the trench is below a bottom surface of the second semiconductor layer; selectively removing an edge portion of the second semiconductor layer in the channel region such that the second semiconductor layer is recessed; forming a sacrificial structure around the recessed second semiconductor layer and over the bottom surface of the trench; and epitaxially growing a source/drain feature in the source/drain region of the fin.