A highly functional photoelectric conversion element is provided. The photoelectric conversion element includes: a semiconductor substrate; a first photoelectric converter that is provided on the semiconductor substrate, and detects light in a first wavelength range and photoelectrically converts the light; a second photoelectric converter that is provided at a position overlapping the first photoelectric converter in a thickness direction of the semiconductor substrate in the semiconductor substrate, and detects light in a second wavelength range and photoelectrically converts the light; an optical filter that is sandwiched between the first photoelectric converter and the second photoelectric converter in the thickness direction, and through which the light in the second wavelength range passes more easily than the light in the first wavelength range; and a first light-shielding member that surrounds the optical filter along a plane orthogonal to the thickness direction to at least partially overlap the optical filter in a plane direction along the plane, and shields at least the light in the second wavelength range.

In one example, a semiconductor structure or device comprises a substrate comprising a conductive structure having a top side and a first shielding terminal on the top side of the conductive structure, an electronic component on the top side of the conductive structure, a package body on the top side of the conductive structure and contacting a side of the electronic component, a shield on a top side of the package body and a lateral side of the package body, and a shield interconnect coupling the shield to the first shielding terminal of the conductive structure. Other examples and related methods are also disclosed herein.

Digital microfluidic (DMF) methods and apparatuses (including devices, systems, cartridges, DMF readers, etc.), and in particular DMF apparatuses and methods adapted for large volume. For example, described herein are methods and apparatuses for DMF using an air gap having a width of the gap that may be between 0.3 mm and 3 mm. Also described herein are DMF readers for use with a DMF cartridges, including those adapted for use with large air gap/large volume, although smaller volumes may be used as well.

A method of processing a substrate is provided. The substrate includes an etching target region and a patterned region. The patterned region is provided on the etching target region. In the method, an organic film is formed on a surface of the substrate. Subsequently, the etching target region is etched by plasma generated from a processing gas. The organic film is formed in a state that the substrate is placed in a processing space within a chamber. When the organic film is formed, a first gas containing a first organic compound is supplied toward the substrate, and then, a second gas containing a second organic compound is supplied toward the substrate. An organic compound constituting the organic film is generated by polymerization of the first organic compound and the second organic compound.

A semiconductor device includes resistor layers, and a wiring layer which is disposed at least either above or below the resistor layers. The resistor layers include first resistor layers and second resistor layers each having a width in a first direction smaller than a width of the first resistor layer in a first direction. The wiring layer includes first overlapping regions in which the wiring layer overlaps with the first resistor layers in plan view and second overlapping regions in which the wiring layer overlaps with the second resistor layers in plan view. A value obtained by dividing a total value of areas of the second overlapping regions by a width of the second resistor layer is smaller than a value obtained by dividing a total value of areas of the first overlapping regions by a width of the first resistor layer.

A semiconductor device, a manufacturing method, and an electronic device capable of achieving both formation of a capacitive element and reduction in parasitic capacitance. A semiconductor device includes an internal electrode on a first surface side of a semiconductor substrate, a through hole at a position corresponding to the internal electrode, a first rewiring on a second surface side of the semiconductor substrate and connected to the internal electrode via the through hole, a second rewiring connected to the first rewiring on a side closer to an external connection terminal than the first rewiring, and an interlayer insulating film between the first and second rewirings. Two of a first internal electrode and a second internal electrode are provided as the internal electrode, and the first rewiring connected to the first internal electrode, the second rewiring connected to the second internal electrode, and the interlayer insulating film constitute a capacitor.

A method of manufacturing a semiconductor device including forming a target layer, forming a pre-modification carbon layer over the target layer, modifying and patterning the pre-modification carbon layer to form a post-modification carbon mask pattern by performing a modification process and a patterning process, and forming trenches in the target layer by performing an etching process using the post-modification carbon mask pattern as an etching mask.

A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode, a first gate insulating film over the oxide semiconductor film, a second gate insulating film over the first gate insulating film, and a gate electrode over the second gate insulating film. The interlayer insulating film has an opening overlapping with a region between the source electrode and the drain electrode, the first gate insulating film, the second gate insulating film, and the gate electrode are placed in the opening of the interlayer insulating film, the first gate insulating film includes oxygen and aluminum, and the first gate insulating film includes a region thinner that is than the second gate insulating film.

A semiconductor device according to one aspect includes a pad portion, an insulating layer that supports the pad portion, a first wiring layer that is formed in a layer below the pad portion and extends in a first direction below the pad portion, and a conductive member that is joined to a front surface of the pad portion and extends in a direction forming an angle of 30 to 30 with respect to the first direction. A semiconductor device according to another aspect includes a pad portion, an insulating layer that supports the pad portion, a first wiring layer that is formed in a layer below the pad portion and extends in a first direction below the pad portion, and a conductive member that is joined to a front surface of the pad portion and has a joint portion that is long in one direction in plan view and an angle of a long direction of the joint portion with respect to the first direction is 30 to 30.

An embodiment of an apparatus may include a substrate, a memory array of vertical 3D NAND strings formed in the substrate, a staircase region formed in the substrate, a polysilicon wordline extended horizontally on a step of the staircase region, a wordline contact extended vertically through the staircase region to make electrical contact with the polysilicon wordline, and an etch stop material formed around the wordline contact and on the polysilicon wordline, where the etch stop material extends to an outside corner of the step, the etch stop material is absent from a sidewall of the step, and the etch stop material is undercut at the outside corner of the step. Other embodiments are disclosed and claimed.