A power module (10) includes a power semiconductor chip (1) and a Cu circuit (3) having the power semiconductor chip (1) provided on one surface. The power module (10) includes: a sintering layer (2) joining the power semiconductor chip (1) and the Cu circuit (3) by using a sintering paste; and a heat dissipation sheet (4) provided for joining a Cu base plate (5) to the other surface of the Cu circuit (3), in which in a first laminated structure in which the power semiconductor chip (1), the sintering layer (2), the Cu circuit (3), and the heat dissipation sheet (4) are laminated, the total thermal resistance XA in the direction of lamination is equal to or less than 0.30 (K/W).

The present invention provides a packaging structure and a manufacturing method thereof. The packaging structure includes a first substrate, a first chip, a second chip, a first heat conductor and a second heat conductor, wherein the first substrate includes a cavity; the first chip is embedded in the cavity and includes a first connecting surface and a first heat-conducting surface that face away from each other; the second chip is disposed on a side of the first connecting surface and electrically connected to the first chip, a side of the second chip distal from the first chip includes a second heat-conducting surface on a side; and the first heat conductor is connected to the first heat-conducting surface, and the second heat conductor is connected to the second heat-conducting surface. The first substrate includes a third connecting surface that is flush with the first connecting surface.

A semiconductor module includes a laminate substrate including a first circuit board on which a semiconductor device having a plurality of upper surface electrodes including a main electrode is disposed and a second circuit board, a main terminal electrically connected to the main electrode, an auxiliary terminal electrically connected to the one of the upper surface electrodes, and a main current wiring member electrically connecting the main electrode to the main terminal. A first path through which a first control current flows and a second path through which a second control current flows are provided between the one of the plurality of upper surface electrodes and the auxiliary terminal. The first control current flows via a first auxiliary wiring, and the second control current flows via the main current wiring member, the second circuit board and a second auxiliary wiring in this order.

A method for manufacturing an electronic package comprises providing at least one electronic component, the at least one electronic component including at least one non-groundable thermal output, providing a substrate in which a ground plane is enclosed in or supported by the substrate, defining at least one thermally conductive pathway extending between an interface exposed on the substrate and the ground plane such that the interface is electrically isolated from the ground plane, and mounting the electronic component to the substrate, the mounting including thermally coupling the output to the interface with at least one thermally conductive member.

A semiconductor package includes: a lower redistribution structure including a lower redistribution layer; external connection bumps below the lower redistribution structure; a lower chip structure on the lower redistribution structure; an encapsulant at least partially encapsulating the lower chip structure; an upper encapsulating layer on the encapsulant; an adhesive layer on an upper surface of the lower chip structure; a plurality of posts extending through the encapsulant and electrically connected to the lower redistribution layer; an upper chip structure on the upper encapsulating layer and electrically connected to the plurality of posts; a heat dissipation member on one side of the upper chip structure and overlapping the lower chip structure in a vertical direction; and a heat transfer material layer extending through the upper encapsulating layer and the adhesive layer and disposed between the heat dissipation member and the lower chip structure.

A semiconductor structure includes: a substrate; a package attached to a first surface of the substrate, where the package includes: an interposer, where a first side of the interposer is bonded to the first surface of the substrate through first conductive bumps; dies attached to a second side of the interposer opposing the first side; and a molding material on the second side of the interposer around the dies; a plurality of thermal interface material (TIM) films on a first surface of the package distal from the substrate, where each of the TIM films is disposed directly over at least one respective die of the dies; and a heat-dissipation lid attached to the first surface of the substrate, where the package and the plurality of TIM films are disposed in an enclosed space between the heat-dissipation lid and the substrate, where the heat-dissipation lid contacts the plurality of TIM films.

A power semiconductor module includes a power semiconductor element having a first electrode, a second electrode, and a control electrode. The power semiconductor element is configured to selectively control a conductivity state between the first electrode and the second electrode. The power semiconductor module further includes a first power line electrically connected to the first electrode, a second power line electrically connected to the second electrode, a first control line electrically connected to the control electrode, a second control line electrically connected to the second electrode, and a heat sink having a front surface on which the power semiconductor element is formed. The heat sink includes a shielding layer. The first control line and the second control line extend through the heat sink.

A semiconductor device includes an insulated circuit board having a lower surface, a heat dissipation base plate having a front surface that includes an arrangement region in which the lower surface of the insulated circuit board is arranged via solder and a solder region in which the solder spreads over the arrangement region, a plating film formed on the front surface of the heat dissipation base plate except for the solder region, and an alloy layer disposed between the solder and the heat dissipation base plate in the arrangement region. The alloy layer contains a solder component that is contained in the solder. In particular, in the semiconductor device, the plating film is formed on an entire surface of the heat dissipation base plate except for an opening region surrounding an outer periphery of the arrangement region where the insulated circuit board is arranged via the solder.

A system comprises: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a power switch including a drain terminal, a source terminal, and a gate terminal; and a controller configured to detect a change in current at the source terminal of the power switch using a complex impedance of a metal trace connected to the source terminal of the power switch, and control a gate control signal to the gate terminal based on the detected change in current.

A composite material includes a plurality of first layers and a plurality of second layers. The total number of the first and second layers is 5 or more. The first and second layers are stacked alternately in the thickness direction of the composite material, such that the first layer is located at each of the first and second surfaces. The first layers are formed from a metal material containing copper as a main component. The second layer includes a molybdenum plate and a coper filler. The molybdenum plate has first and second faces that are each an end face in the thickness direction, and a plurality of openings extending through the molybdenum plate from the first face to the second face.