A method of providing access to a contact pad located on a base polyimide layer of an electronic part comprises (i) covering the contact pad and the base polyimide layer with a cover layer comprised of a metallic mask layer, a polyimide layer, and an adhesive layer. The adhesive layer attaches the cover layer to the contact pad and the base polyimide layer. The metallic mask layer is exposed. The method further includes (ii) removing a portion of the metallic mask layer of the cover layer directly above the contact pad, and (iii) through the removed portion of the metallic mask layer, using a plasma-etching process to create an access opening to the contact pad through the polyimide layer and the adhesive layer.

The present disclosure provides various embodiments of imaging mask stacks, platforms for producing an imaging mask stack, and methods for lithographically patterning a substrate using an imaging mask stack, as described herein. An imaging mask stack in accordance with the present disclosure includes a relatively thin (e.g., 5 nm or less) photosensitive imaging layer formed on or above a thicker mask layer having a significantly higher etch selectivity (e.g., 1:10 or more) than the photosensitive imaging layer. In some embodiments, the imaging mask stack may include one or more additional thin film layers, such as a second photosensitive imaging layer and/or a sensitivity enhancement layer, which enhances absorption of electromagnetic radiation within the photosensitive imaging layer.

A method of manufacturing a semiconductor device includes forming a first tone resist layer over an underlayer. The first tone resist layer is pattern to form a first pattern exposing a portion of the underlayer. The first pattern is extended into the underlayer, and the first tone resist layer is removed. A second tone resist layer is formed over the underlayer, wherein the second tone is opposite the first tone. The second tone resist layer is patterned to form a second pattern exposing another portion of the underlayer. The second pattern is extended into underlayer, and the second tone resist layer is removed.

The present invention pertains to methods, apparatuses and computer programs for processing an object for lithography. A method for processing an object for lithography comprises: (a) providing a first gas; (b) providing a second gas, the second gas including second molecules capable of performing an inversion oscillation; (c) providing a particle beam in a working region of the object for production of a deposition material in the working region based at least partly on the first gas and the second gas. The second gas is provided with a gas flow rate of less than 5 sccm, preferably less than 2 sccm, more preferably less than 0.5 sccm.

Disclosed are a semiconductor photoresist composition and a method of forming patterns using the semiconductor photoresist composition. The semiconductor photoresist composition includes an organometallic compound represented by Chemical Formula 1 and a solvent and a method of forming patterns using the same.

A highly conductive and heat-dissipating chip and a manufacturing method thereof are provided. The manufacturing method includes: providing a substrate having a first surface and a second surface that is opposite to the first surface; forming a groove having at least one arc shape on the substrate; and filling a heat-dissipating material into the groove. Accordingly, a heat dissipation effect of the substrate can be enhanced, a structure of the substrate can be protected, and a service life of the substrate can be prolonged.

Provided are a resist compound, a method of forming a pattern by using the same, and a method of manufacturing a semiconductor device using the same. According to the present disclosure, the compound may be represented by Formula 1: ##STR00001##

A method is provided for fabricating a semiconductor wafer having a device side, a back side opposite the device side and an outer periphery edge. Suitably, the method includes: forming a top conducting layer on the device side of the semiconductor wafer; forming a passivation layer over the top conducting layer, the passivation layer being formed so as not to extend to the outer periphery edge of the semiconductor wafer; and forming a protective layer over the passivation layer, the protective layer being spin coated over the passivation layer so as to have a smooth top surface at least in a region proximate to the outer periphery edge of the semiconductor wafer.

An object of the present invention is to provide a liquid chemical exhibiting excellent defect inhibitive performance even in a case of being applied to a resist process by EUV exposure. Another object thereof is to provide a method for producing a liquid chemical. The liquid chemical of the present invention includes an organic solvent; Fe nanoparticles containing a Fe atom and having a particle size of 0.5 to 17 nm; and Pb nanoparticles containing a Pb atom and having a particle size of 0.5 to 17 nm, in which a ratio of the number of the Fe nanoparticles contained to the number of the Pb nanoparticles contained is 1.0 to 1.010.sup.4, based on the number of the particles per unit volume of the liquid chemical.

A processing method including a step that takes an image of the end face of a reference substrate, whose warp amount is known, over the whole periphery thereof using a camera to obtain shape data of the end face of the reference substrate; a step that takes an image of the end face of a process substrate over the whole periphery thereof using a camera to obtain shape data of the end face of the process substrate; a step that calculates warp amount of the process substrate based on the obtained shape data; a step that forms a resist film on a surface of the process substrate; a step that determines the supply position from which an organic solvent is supplied to a peripheral portion of the resist film and dissolves the peripheral portion by the solvent supplied from the supply position to remove the same from the process substrate.