Patent classifications
H10P76/2041
Substrate processing apparatus and substrate processing method
A substrate processing apparatus includes a hot plate configured to support a substrate having a film formed thereon and perform a heat treatment of heating the substrate; a chamber configured to cover the substrate supported by the hot plate; a gas discharger, having a head member provided with multiple discharge holes distributed along a surface facing the substrate supported by the hot plate, configured to discharge a gas toward a surface of the substrate from the multiple discharge holes; a peripheral exhaust device configured to evacuate a processing space within the chamber from an outer peripheral region outside a periphery of the substrate supported by the hot plate; and a controller. The controller controls the peripheral exhaust device to increase an exhaust amount from the peripheral exhaust device in a state that the substrate is heated.
PHOTORESIST COMPOSITIONS AND PATTERN FORMATION METHODS
A polymer having a repeating unit derived from a first monomer of formula (I)
##STR00001##
wherein R.sub.1, R.sub.3, R.sub.4, R.sub.5, R.sub.6 are independently H, a linear or branched or alicyclic substituted or unsubstituted alkyl group having from 1 to 20 carbon atoms, or a substituted or unsubstituted aromatic group having from 5 to 20 carbon atoms; R.sub.2 is chosen from null, a linear or branched or alicyclic substituted or unsubstituted alkyl group having from 1 up to 20, up to 15 carbon atoms or a substituted or unsubstituted aromatic group having from 5 to 20 carbon atoms; and n is an integer of 0 to 3, or R.sub.1 and R.sub.2 or R.sub.1 and R.sub.6 together with the carbon atoms in the ring structure to which they are attached form cyclic structures. The polymer can be used in a photoresist composition.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A method includes dispensing a first photoresist material onto a first substrate positioned on a substrate stage within a process chamber of a coating apparatus, wherein the process chamber is in a first exhaust rate during the dispensing the first photoresist material; measuring a thickness of the first photoresist material on the first substrate; adjusting an exhaust efficiency within the process chamber through an exhaust assembly based on the measured thickness, wherein the adjustment regulates an evacuation of air and volatiles from the process chamber; dispensing a second photoresist material onto a second substrate positioned on the substrate stage, wherein the process chamber is in a second exhaust rate during the dispensing the second photoresist material.
EXTREME ULTRAVIOLET LITHOGRAPHY PATTERNING METHOD
A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.
Surface modification for metal-containing photoresist deposition
Techniques described herein relate to methods, apparatus, and systems for promoting adhesion between a substrate and a metal-containing photoresist. For instance, the method may include receiving the substrate in a reaction chamber, the substrate having a first material exposed on its surface, the first material including a silicon-based material and/or a carbon-based material; generating a plasma from a plasma generation gas source that is substantially free of silicon, where the plasma includes chemical functional groups; exposing the substrate to the plasma to modify the surface of the substrate by forming bonds between the first material and chemical functional groups from the plasma; and depositing the metal-containing photoresist on the modified surface of the substrate, where the bonds between the first material and the chemical functional groups promote adhesion between the substrate and the metal-containing photoresist.
METHODS OF FORMING PATTERNED STRUCTURE
The present disclosure provides a method of forming a patterned structure. The method includes the following operations. A photoresist layer on a target layer is patterned to form a first opening in a patterned photoresist layer. A directed self-assembly layer is formed on the patterned photoresist layer and in the first opening, in which a directed self-assembly material in the directed self-assembly layer separates into a first phase on the patterned photoresist layer and a second phase in the first opening by the first phase being attracted by a polarity of the patterned photoresist layer. The second phase is removed to form a second opening through the directed self-assembly layer. The target layer is etched through the second opening.
METHODS TO IMPROVE MECHANICAL PROPERTIES OF PELLICLE MEMBRANE
A pellicle assembly includes a pellicle membrane with a nanotube layer formed from nanotubes having a minimum length of 1,000 m. The pellicle membrane can be formed with multiple layers and has a combination of high transmittance, low deflection, and small pore size. A conformal coating may applied to an outer surface of the pellicle membrane. The conformal coating is intended to protect the pellicle membrane from damage that can occur due to heat and hydrogen plasma created during EUV exposure.
LINE EDGE ROUGHNESS REDUCTION THROUGH APPLICATION OF TENSILE STRESS
Embodiments described herein relate to a method, that obtaining a substrate with a patterned resist layer positioned over a patterning stack, wherein the patterned resist layer comprises a first low frequency roughness. In an embodiment, the method further includes forming a capping layer on the patterned resist layer. In an embodiment, a bottom of the patterned resist layer is exposed, and the patterned resist layer has a second low frequency line edge roughness that is lower than the first low frequency line edge roughness after the capping layer is formed.
Method of manufacturing semiconductor device
The method including forming a first photoresist (PR) pattern by exposing first field areas of a first PR layer, forming a second PR pattern by exposing first top field areas and first bottom field areas of a second PR layer, measuring a first top intra-field overlay for the first top field areas and a first bottom intra-field overlay for the first bottom field areas, and determining a top intra-field correction parameter and a bottom intra-field correction parameter based on the first top intra-field overlay and the first bottom intra-field overlay, respectively, may be provided.
PHOTORESIST STRUCTURE, SEMICONDUCTOR DEVICE COMPRISING THE SAME, AND METHOD FOR FABRICATING THE SEMICONDUCTOR DEVICE COMPRISING THE SAME
The present application discloses a photoresist structure, a semiconductor device including the photoresist structure, and a method for fabricating the semiconductor device including the photoresist structure. The photoresist structure includes a bottom photoresist layer and a top photoresist layer positioned on the bottom photoresist layer. A coefficient of thermal expansion of the top photoresist layer is greater than a coefficient of thermal expansion of the bottom photoresist layer.