Patent classifications
H10W40/037
CERAMIC SUBSTRATE UNIT AND METHOD FOR PRODUCING SAME
The present disclosure relates to a ceramic substrate unit and a method of manufacturing the same, and is configured such that the ceramic substrate unit includes a ceramic base, an upper metal layer bonded to a top surface of the ceramic base and configured to allow a semiconductor chip to be mounted thereon, a wiring unit including an insulating layer and an electrode layer arranged on the insulating layer, and bonded to a top surface of the upper metal layer, and a heat sink bonded to a bottom surface of the ceramic base, wherein the electrode layer of the wiring unit is connected to the semiconductor chip to form wiring.
Integrated circuit heat spreader including sealant interface material
A hybrid integrated heat spreader suitable for an integrated circuit (IC) die package. The hybrid integrated heat spreader includes a top sheet material and a sealant interface material located where the heat spreader is to contact an assembly substrate. The sealant interface material may offer greater adhesion to a sealant employed between the interface material and the package substrate. In some examples, the sealant interface material has a greater surface roughness and/or a different composition than a surface of the integrated heat spreader that is in close thermal contact with an IC die through a thermal interface material. With the sealant interface material improving adhesion, the sealant may have a higher bulk modulus, enabling the integrated heat spreader to impart greater stiffness to the IC die package assembly.
Impingement cooling in high power package
This application is directed to cooling a semiconductor system. The semiconductor system includes a device substrate having a first surface and a second surface, an electronic component thermally coupled to the device substrate, and a cooling substrate coupled to the device substrate. The cooling substrate includes a third surface facing the second surface of the device substrate, a fourth surface opposite the third surface, and a plurality of vias between the third and fourth surfaces. The second surface and the third surface define a cavity therebetween, such that in use coolant flows from the fourth surface through the plurality of vias to exit at the third surface, enters the cavity between the second and third surfaces, and impinges on the second surface. At least a portion of one or more of the device substrate and the cooling substrate have similar coefficients of thermal expansion.
CHIP THERMAL MANAGEMENT USING COOLANT DELIVERY TO AN EVAPORATIVE CHAMBER
Integrated circuit (IC) devices employing thermal management of heat-generating dies.
Heat may be removed from an IC die by supplying a coolant liquid to a chamber thermally coupled to the die and by discharging the coolant from the chamber as a vapor. Measured or provided die and/or coolant parameters may be used to control coolant flow. A device includes a porous structure in a chamber thermally coupled to an IC die, the chamber in a body having a first microchannel network configured for supplying liquid coolant to the chamber and a second microchannel network configured for removing vaporized coolant from the chamber. The chamber may include multiple supply openings for directing or controlling coolant to particular areas of the chamber and one or more associated dies. The chamber may include multiple exhaust openings for removing coolant from particular areas of the chamber.
INTEGRATED CIRCUIT PACKAGE CAPABLE OF INDEPENDENTLY ASSEMBLING PASSIVE DEVICE AND MANUFACTURING METHOD THEREOF
The present invention provides an integrated circuit package capable of independently assembling passive devices and a manufacturing method thereof. The integrated circuit package includes: an integrated circuit configured to be mounted on a circuit board; and a heat dissipation structure, which is manufactured independently and has a first-layer flat plate disposed above the integrated circuit and in thermal contact therewith, and a cavity located on one side of the first-layer flat plate. The cavity is formed with at least one opening to accommodate a passive device. During assembly, the passive device is inserted into the cavity of the heat dissipation structure through the at least one opening and is electrically connected to the circuit board or the integrated circuit via an electrical conductor of the passive device. Heat generated by the integrated circuit is transferred through the heat dissipation structure.
Package lid with a vapor chamber base having an angled portion and methods for forming the same
A semiconductor package includes a package substrate, an interposer module on the package substrate, and a package lid on the interposer module and including a vapor chamber base, the vapor chamber base including a plate portion, and an angled portion extending at an angle from opposing ends of the plate portion. A method of cooling the semiconductor package may include locating the semiconductor package in an immersion cooling chamber, immersing the semiconductor package in an immersion coolant in the immersion cooling chamber such that a plate portion and an angled portion of a vapor chamber base of the package lid is immersed in the immersion coolant, and transferring heat from the plate portion and angled portion of the vapor chamber base to the immersion coolant to cool the semiconductor package.
POWER SUPPLY MODULE FOR IMMERSION COOLING, SIGNAL CONNECTION SUBSTRATE, AND AN ASSEMBLY AND MANUFACTURING METHOD
The present invention is directed to a power supply module for immersion cooling, by providing uneven edges between the edge of the metal layer of the upper surface and the lower surface of the third substrate and the edge of the third substrate, the design of the spacing between adjacent metal layers and the design of the height of the gap between the third substrate and the first substrate or the second substrate, the faults and failures caused by the conductive particles in the cooling fluid are reduced. On the other hand, by dispensing glue at the key position between the first substrate and the third substrate and between the second substrate and the third substrate, the possibility that the conductive particles fluid into the power supply module is further reduced. The present invention further discloses several structures and manufacturing processes of the third substrate for immersion cooling.
Electronic converter designed on the basis of welding technologies
A converter including a semiconductor module and a cooling housing. The semiconductor module includes a semiconductor chip, a substrate having a first side and a second side, a base plate having a first side and a second side, and a molding compound. The semiconductor chip connects to the first side of the substrate. The second side of the substrate connects to the first side of the base plate, the second side of the base plate has a first region and a second region. The first region has a surface expansion, and the first region having the surface expansion contacts with a coolant liquid in an operating state. The second region forms a closed path around the first region, the cooling housing has a plate including at least one hole, and the plate is connected around the hole to the second region of the base plate by welding.
Semiconductor package structures and methods of forming the same
A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a redistribution structure disposed over the substrate, and a semiconductor die disposed over the redistribution structure. The redistribution structure includes a dielectric layer, a conductive feature formed in the dielectric layer, and a heat transfer feature formed in the dielectric layer and being electrically isolated from the conductive feature. The semiconductor die is electrically connected to the conductive feature. The semiconductor die partially overlaps the heat transfer feature from a top view.