A device includes a high frequency chip and a dielectric material arranged between a first area radiating an electromagnetic interference signal in a first frequency range between 1 GHz and 1 THz and a second area receiving the electromagnetic interference signal. An attenuation of the dielectric material is more than 5 dB/cm at least in a subrange of the first frequency range.

An electronic device is provided. The electronic device includes a shield can including a first cavity and a first opening to communicate with the first cavity, an electronic component disposed in the first cavity, a shielding sheet disposed at an upper portion of the shield can, communicating with the first cavity, and defining a second cavity, the shielding sheet including a first part contacting the shield can, a heat-dissipation member disposed on the shielding sheet to close the second cavity, and a thermal interface material (TIM) disposed between the heat-dissipation member and the electronic component. The shield can, the shielding sheet, and the heat-dissipation member are electrically connected to each other, the electronic component, the TIM, and the heat-dissipation member are thermally connected to each other, the first cavity has a first width, and the second cavity has a second width, greater than the first width.

A wiring board includes a first insulating layer, a second insulating layer, a first ground conductor, and a first signal conductor. The first insulating layer includes a first upper surface and a first lower surface. The second insulating layer is positioned on the first insulating layer and includes a second upper surface and a second lower surface. The first ground conductor is positioned on the first lower surface and includes a first opening and a second opening. The first signal conductor includes a first line positioned on the first upper surface and a second line positioned on the second lower surface. The first line includes a first end portion and a first line portion. The second line includes a second end portion electrically connected to the first end portion, and a second line portion. The first opening is larger in area than the second opening in a planar view.

An electronic device, includes (a) a semiconductor substrate, (b) a plurality of transistors formed on a first side of the semiconductor substrate, and (c) a first set of metal interconnect layers formed on the first side of the semiconductor substrate, and a second set of metal interconnect layers formed on a second side of the semiconductor substrate opposite to the first side, each of the first set and the second set of metal interconnect layers includes (i) one or more layers whose electrical resistance is in a first range of resistances, and (ii) at least one layer whose electrical resistance is in a second range of resistances, lower than the first range.

A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

Improvement in heat dissipation capability is intended. A radio-frequency module includes a mounting substrate, a plurality of transmission filters, a resin layer, and a shield layer. The mounting substrate has a first major surface and a second major surface opposite to each other. The plurality of transmission filters is mounted on the first major surface of the mounting substrate. The resin layer is disposed on the first major surface of the mounting substrate and covers at least part of an outer peripheral surface of each of the plurality of transmission filters. The shield layer covers the resin layer and at least part of each of the plurality of transmission filters. At least part of a major surface of each of the plurality of transmission filters on an opposite side to the mounting substrate side is in contact with the shield layer.

This invention provides opportunity for diamond and bi-wafer microstructures to be implemented in advanced ICs and advanced IC packages to form a new breed of ICs and SiPs that go beyond the limitations of silicon at the forefront of IC advancement due primarily to diamond's extreme heat dissipating ability. Establishing the diamond and bi-wafer microstructure capabilities and implementing them in advanced ICs and advanced IC packages gives IC and package architects and designers an extra degree of design freedom in achieving extreme IC performance, particularly when thermal management presents a challenge. Diamond's extreme heat spreading ability can be used to dissipate hotspots in processors and other high-power chips such as GaN HEMT, resulting in performance and reliability enhancement for IC and package applications covering HPC, AI, photonics, 5G RF/mmWave, power and IoT, and at the system level propelling the migration from traditional computing to near-memory computing and in-memory computing.

Embodiments of a microelectronic assembly comprise a package substrate, including: a first layer comprising a first plurality of mutually parallel channels of a first material; a second layer comprising columns of the first material; and a third layer comprising a second plurality of mutually parallel channels of the first material. The second layer is between the first layer and the third layer, at least some columns extend between and contact the first plurality of mutually parallel channels and the second plurality of mutually parallel channels, and at least a portion of the first layer, the second layer, and the third layer comprises a second material different from the first material.

Embodiments of a microelectronic assembly comprise a package substrate, including: a first layer comprising a first plurality of mutually parallel channels of a first material; a second layer comprising columns of the first material; and a third layer comprising a second plurality of mutually parallel channels of the first material. The second layer is between the first layer and the third layer, at least some columns extend between and contact the first plurality of mutually parallel channels and the second plurality of mutually parallel channels, and at least a portion of the first layer, the second layer, and the third layer comprises a second material different from the first material.

A 3D device including: a first level including first transistors and a first interconnect; a second level including second transistors, the second level overlaying the first level; and at least four electronic circuit units (ECUs), where each of the ECUs include a first circuit, the first circuit including a portion of the first transistors, where each of the ECUs includes a second circuit, the second circuit including a portion of the second transistors, where each of the ECUs includes a first vertical bus, where the first vertical bus provides electrical connections between the first circuit and the second circuit, where each of the ECUs includes at least one processor and at least one memory array, where the second level is bonded to the first level, and where the bonded includes oxide to oxide bonding regions and metal to metal bonding regions.