H10P72/7408

Wafer carrier and method

A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.

Mass transfer device and mass transfer system

A mass transfer device includes at least one transfer cavity. Each transfer cavity is configured to accommodate a plurality of micro light-emitting diodes. Each transfer cavity includes a bottom plate and a cavity wall connecting the bottom plate. The bottom plate defines a plurality of through holes spaced apart from each other. The transfer cavity is used to transfer the plurality of micro light-emitting diodes to the array substrate of a display panel through the plurality of through holes.

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
20260047240 · 2026-02-12 ·

A display device and a method of manufacturing the same are provided. The display device includes a first alignment electrode and a second alignment electrode spaced apart from each other, a light emitting element between the first alignment electrode and the second alignment electrode, a first auxiliary electrode at a first side of the light emitting element in a plan view, and separated from the first alignment electrode, and a second auxiliary electrode at a second side of the light emitting element in a plan view, and separated from the second alignment electrode, wherein an alignment signal is configured to be applied to the first alignment electrode, and wherein a first auxiliary signal of a phase that is different from a phase of the alignment signal is configured to be applied to the first auxiliary electrode.

Manufacturing method of chip-attached substrate and substrate processing apparatus

A manufacturing method of a chip-attached substrate includes preparing a stacked substrate including multiple chips, a first substrate to which the multiple chips are temporarily bonded, and a second substrate bonded to the first substrate with the multiple chips therebetween; and separating the multiple chips bonded to the first substrate and the second substrate from the first substrate to bond the multiple chips to one surface of a third substrate including a device layer.

Method for bonding and debonding substrates
12581906 · 2026-03-17 ·

The invention relates to a method for the temporary bonding of a product substrate with a carrier substrate and for the debonding of a product substrate from a carrier substrate, corresponding devices and a substrate stack.

Method for forming semiconductor packages using dielectric alignment marks and laser liftoff process

A method for making forming a semiconductor package comprises forming a plurality of alignment marks in or on a carrier substrate; positioning and bonding a plurality of semiconductor dies to the carrier substrate based on the plurality of alignment marks; further processing the plurality of semiconductor dies into a reconstituted wafer; and decoupling the reconstituted wafer from the carrier substrate at an interface using a laser source. The alignment marks are interposed between the interface and the laser source.

Apparatus for processing of singulated dies and methods for using the same

Embodiments herein are generally directed to die cleaning frames for processing and handling singulated devices and methods related thereto. The die cleaning frames may be used advantageously to minimize contact with device surfaces during post-singulation processing and to facilitate a pick and place bonding process without touching the active side of the cleaned device. Thus, the die cleaning frames and methods described herein eliminate the need for undesirable contact with clean and prepared active sides of the devices during a direct placement die-to-wafer bonding process. In one embodiment, a carrier configured to support a singulated device in a die pocket region may include a carrier plate and a frame that surrounds the carrier plate and is integrally formed therewith. The carrier plate may include a first surface and an opposite second surface, and one or more sidewalls that define an opening disposed through and extending between the first and second surfaces. Each of the sidewalls may include one or more protuberances that collectively determine a rectangular boundary of the die pocket region. Some of the protuberances may include a die supporting surface that extends beneath the die pocket region.

MASS TRANSFER METHOD
20260130175 · 2026-05-07 ·

A mass transfer method includes providing at least one transfer cavity including a bottom plate with through holes and a cavity wall connecting the bottom plate; providing an array substrate with capture holes; placing micro light emitting diodes into each transfer cavity; attaching the array substrate to the bottom plate; aligning each through hole with a corresponding capture hole by moving the array substrate; causing the micro light emitting diodes to fall into a corresponding capture hole through the corresponding one through hole; and continuously moving the array substrate such that each capture hole in the array substrate is filled with one micro light emitting diode.