A method of fabricating semiconductor fins, including, patterning a film stack to produce one or more sacrificial mandrels having sidewalls, exposing the sidewall on one side of the one or more sacrificial mandrels to an ion beam to make the exposed sidewall more susceptible to oxidation, oxidizing the opposite sidewalls of the one or more sacrificial mandrels to form a plurality of oxide pillars, removing the one or more sacrificial mandrels, forming spacers on opposite sides of each of the plurality of oxide pillars to produce a spacer pattern, removing the plurality of oxide pillars, and transferring the spacer pattern to the substrate to produce a plurality of fins.

Provided is a method for manufacturing a semiconductor device, in which a mask layer, a buffer layer, and a first mandrel layer are sequentially stacked on a substrate including a first region and a second region. First mandrel patterns are formed on the buffer layer in the first region, and a second mandrel pattern covering the buffer layer in the second region is formed. A first spacer contacting side walls of the first mandrel pattern and the second mandrel pattern is formed on the buffer layer. The first mandrel patterns are removed. A buffer layer pattern and a preliminary mask pattern are formed on the substrate. The second mandrel pattern is removed. In addition, a mask pattern is formed. The buffer layer includes a material having lower electrical conductivity than the mask layer and having etching selectivity with respect to the mask layer.

A method for performing a feedback sequence for patterning CD control. The method including performing a series of process steps on a wafer to obtain a plurality of features, wherein a process step is performed under a process condition. The method including measuring a dimension of the plurality of features after performing the series of process steps. The method including determining a difference between the dimension that is measured and a target dimension for the plurality of features. The method including modifying the process condition for the process step based on the difference and a sensitivity factor for the plurality of features relating change in dimension and change in process condition.

A semiconductor structure including a pillar structure and a spacer structure is provided. The pillar structure is disposed over a substrate, and comprises: a lower layer, disposed on the substrate; an upper layer, disposed over the lower layer; and a dielectric layer, disposed between the lower layer and the upper layer, wherein the upper layer includes a first portion and a second portion disposed below and connecting the first portion. The spacer structure laterally surrounds the pillar structure, and comprises: an upper portion, surrounding the first portion of the upper layer; and a lower portion, disposed below and connecting the upper portion, wherein a first thickness of the upper portion is substantially greater than a second thickness of the lower portion. A method for manufacturing a semiconductor structure is also provided.

Provided is a composition for forming an organic film which has both embedding and planarization properties, and a method for forming an organic film and a patterning process using the composition. A composition for forming an organic film, containing: (A) an aromatic ring-containing resin; (B) a polymer containing a repeating unit containing a -diketone structure represented by the following formula (1):

##STR00001## wherein L.sub.1 is a saturated or unsaturated linear or branched divalent hydrocarbon group having 2 to 20 carbon atoms, R.sub.A and R.sub.B each are a hydrogen atom, a substituted or unsubstituted linear alkyl group having 1 to 20 carbon atoms, a substituted or unsubstituted branched or cyclic alkyl group having 3 to 20 carbon atoms, a substituted or unsubstituted aliphatic unsaturated hydrocarbon group having 2 to 20 carbon atoms and containing one or more double or triple bonds, a substituted or unsubstituted heteroalkyl group having 1 to 30 carbon atoms, a substituted or unsubstituted aryl group having 6 to 30 carbon atoms, a thiol group, a hydroxy group, an amino group, a carboxy group, or a halogen group; and (C) a solvent.

A pick-up structure for a memory device and method for manufacturing memory device are provided. The pick-up structure includes a substrate and a plurality of pick-up electrode strips. The substrate has a memory cell region and a peripheral pick-up region adjacent thereto. The pick-up electrode strips are parallel to a first direction and arranged on the substrate in a second direction. The second direction is different from the first direction. Each pick-up electrode strip includes a main part in the peripheral pick-up region and an extension part extending from the main part to the memory cell region. The main part is defined by fork-shaped patterns of a first mask layer. The extension part has a width less than that of the main part, and the extension part has a side wall surface aligned with a side wall surface of the main part.

A conductive gate over a semiconductor fin is cut into a first conductive gate and a second conductive gate. An oxide is removed from sidewalls of the first conductive gate and a dielectric material is applied to the sidewalls. Spacers adjacent to the conductive gate are removed to form voids, and the voids are capped with a dielectric material to form air spacers.

Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first plurality of semiconductor fins having a longest dimension along a first direction. Adjacent individual semiconductor fins of the first plurality of semiconductor fins are spaced apart from one another by a first amount in a second direction orthogonal to the first direction. A second plurality of semiconductor fins has a longest dimension along the first direction. Adjacent individual semiconductor fins of the second plurality of semiconductor fins are spaced apart from one another by the first amount in the second direction, and closest semiconductor fins of the first plurality of semiconductor fins and the second plurality of semiconductor fins are spaced apart by a second amount in the second direction.

Methods and systems for semiconductor processing are provided. Methods and systems include forming a selective layer of carbon-containing material on a photoresist material disposed over a surface of a substrate within a processing region of a semiconductor processing chamber. Methods and systems include where the layer of carbon-containing material is selectively formed over the photoresist material. Methods and systems include forming the layer of carbon-containing material by using one or more cycles of: providing a first molecular species that selectively couples with the photoresist material, and providing a second molecular species that selectively couples with the first molecular species.

The disclosure relates to the manufacture of semiconductor devices, especially to methods and processing assemblies for forming a patterned structure on a substrate. The methods comprise providing the substrate comprising a first structure into a reaction chamber, wherein a surface of the first structure comprises a first material and the substrate comprises a second material, and selectively depositing a conformal passivation layer on the first material relative to the second material to cover the first structure, and selectively depositing an etch-stop layer on the second material relative to the passivation layer. In some embodiments, a multiple patterning or a tone reversal of a pattern may be performed using the methods and deposition assemblies of the disclosure.