Techniques described herein relate to methods, apparatus, and systems for promoting adhesion between a substrate and a metal-containing photoresist. For instance, the method may include receiving the substrate in a reaction chamber, the substrate having a first material exposed on its surface, the first material including a silicon-based material and/or a carbon-based material; generating a plasma from a plasma generation gas source that is substantially free of silicon, where the plasma includes chemical functional groups; exposing the substrate to the plasma to modify the surface of the substrate by forming bonds between the first material and chemical functional groups from the plasma; and depositing the metal-containing photoresist on the modified surface of the substrate, where the bonds between the first material and the chemical functional groups promote adhesion between the substrate and the metal-containing photoresist.

The present disclosure relates to high selectivity doped hardmask films, as well as methods of providing and using such films. In particular examples, the high selectivity doped hardmask film can be employed as a hardmask, an intermediate layer, or a coverage layer.

The present disclosure provides a method of forming a patterned structure. The method includes the following operations. A photoresist layer on a target layer is patterned to form a first opening in a patterned photoresist layer. A directed self-assembly layer is formed on the patterned photoresist layer and in the first opening, in which a directed self-assembly material in the directed self-assembly layer separates into a first phase on the patterned photoresist layer and a second phase in the first opening by the first phase being attracted by a polarity of the patterned photoresist layer. The second phase is removed to form a second opening through the directed self-assembly layer. The target layer is etched through the second opening.

A method for processing a substrate includes receiving the substrate on a substrate holder, the substrate including a patterned mask disposed over a patterned underlying layer, the patterned mask including notches. The method further includes having a plurality of polar angles and a plurality of processing times, each of the plurality of polar angles having an associated one of the plurality of processing times, and processing the substrate with a cyclic process for each of the plurality of polar angles. Each cycle of the cyclic process includes selecting a polar angle (.sub.i) from the plurality of polar angles. Each cycle further includes tilting a processing tool such that a beam emitted from the processing tool strikes the substrate at the selected polar angle (.sub.i), and emitting the beam at the selected polar angle (.sub.i) for an i.sup.th timeframe (t.sub.i) corresponding to the selected polar angle (.sub.i) to deposit an i.sup.th layer over the notches.

A semiconductor structure includes: a semiconductor substrate; a gate dielectric layer over the semiconductor substrate; and a gate electrode over the gate dielectric layer. The gate dielectric layer includes a first portion and a second portion thinner than the first portion, wherein the gate electrode is over the first portion and the second portion, and the first portion includes a third portion including nitrogen and enclosed by the first portion.

A semiconductor device fabrication method includes forming a substrate having first and second regions therein, with different densities of active regions in the first and second regions. A cell trench is formed, which defines cell active regions in the first region, and a peripheral trench is formed, which defines peripheral active regions in the second region. A first insulating layer is formed in the cell trench and the peripheral trench. A mask is selectively formed, which covers the first insulating layer in the first region and exposes the first insulating layer in the second region. A second insulating layer is formed on the first insulating layer in the second region exposed by the mask, using a selective dielectric-on-dielectric deposition process. The first insulating layer is exposed in the first region by removing the mask. A third insulating layer is formed on the first insulating layer in the first region and on the second insulating layer in the second region.

Semiconductor devices and corresponding methods of manufacture are disclosed. The method may include forming a first hardmask layer over a substrate. The method may include forming a second hardmask layer over the first hardmask layer. The method may include transferring a pattern from the second hardmask layer to the first hardmask layer, wherein the pattern in the first hardmask layer comprises a plurality of protruding structures, and each of the plurality of protruding structures has respective portions of its two sidewalls extending toward each other. The method may include depositing a modification layer extending along at least the respective portions of the sidewalls of each of the protruding structures. The method may include etching the substrate with the protruding structures and the modification layer both serving as a mask.

A method for fabricating semiconductor devices is disclosed. The method includes forming a stack over a substrate. The method includes forming a hardmask layer over the stack, the hardmask layer comprising a first tungsten containing sub-layer, and at least one compressive sub-layer and at least one tensile sub-layer. The method includes forming a patternable layer over the hardmask layer. The method includes etching the hardmask layer according to the patternable layer.

The present disclosure provides a method of forming a semiconductor structure. The method includes the following operations. A diamond-like carbon hard mask layer is formed on a substrate, in which an absorbance of the diamond-like carbon hard mask layer is smaller than or equal to 0.5. A dielectric anti-reflective coating layer is formed on the diamond-like carbon hard mask layer. A bottom anti-reflective coating layer is formed on the dielectric anti-reflective coating layer.

A method of processing a substrate that includes: forming a conformal etch stop layer (ESL) over a staircase pattern of the substrate, the staircase pattern including staircases, each of the staircases including a conductive surface; forming a dielectric layer over the ESL; planarizing a top surface of the dielectric layer; forming a patterned hardmask over the dielectric layer; and etching the dielectric layer selectively to the ESL using the patterned hardmask as an etch mask to form a plurality of recesses, each of the plurality of recesses landing on each of the staircases, the ESL protecting the conductive surface from the etching, the etching including exposing the substrate to a plasma generated from a process gas including a fluorocarbon, O.sub.2, and WF.sub.6, a flow rate of WF.sub.6 being between 0.01% and 1% of a total gas flow rate of the process gas.