Patent classifications
H10P72/7616
Electrostatic chuck
An electrostatic chuck 10 includes a dielectric substrate 100, a base plate 200 which supports the dielectric substrate 100, and a joining layer 300 which joins the dielectric substrate 100 and the base plate 200. A value of a dielectric tangent of the joining layer 300 when a temperature of the joining layer 300 is 20 C. is set as a reference value. In the electrostatic chuck 10, when the temperature of the joining layer 300 has changed from 20 C. to 60 C., a range in which the value of the dielectric tangent of the joining layer 300 fluctuates falls within a range from 50% to 200% of the reference value.
PROTECTIVE COATING FOR A USED SEMICONDUCTOR PROCESSING COMPONENT
A refurbishment method is provided to restore and protect a semiconductor processing component used in a semiconductor reactor. The method includes removing parasitic deposits from a semiconductor processing component accumulated from the semiconductor reactor. A new protective coating is then applied to the semiconductor processing component.
MEMBER FOR SEMICONDUCTOR MANUFACTURING APPARATUS
A member for a semiconductor manufacturing apparatus includes a ceramic base material and a conductor. The conductor is arranged in the ceramic base material. The ceramic base material contains a ceramic material having a thermal expansion coefficient of from 2.010.sup.6/ C. to 10.010.sup.6/ C. and spinel. The conductor includes a surface layer containing spinel and a skeleton positioned inside the surface layer.
Substrate fixing device
A substrate fixing device includes a base plate having a first surface in which a plurality of first bottomed holes are formed, an electrostatic chuck mounted on the first surface of the base plate and having a second surface facing the first surface, the second surface being formed therein with a plurality of second bottomed holes each connected to each of the first bottomed holes, and a plurality of fixing members each fit into one first bottomed hole and one second bottomed hole.
HEAT TREATMENT APPARATUS AND HEAT TREATMENT METHOD FOR HEATING SUBSTRATE BY LIGHT IRRADIATION
A support ring which is an annular protrusion of quartz having a diameter smaller than that of a semiconductor wafer is provided upright on an upper surface of a holding plate of a susceptor. A flash of light is applied to a front surface of the semiconductor wafer supported by the support ring to heat the semiconductor wafer. When the semiconductor wafer is placed on the support ring, an enclosed space is formed which is surrounded by the upper surface of the holding plate, a lower surface of the semiconductor wafer, and an inner wall surface of the support ring. At the time of the flash irradiation, a force pressing from above is exerted on the front surface of the semiconductor wafer because of a pressure difference between the space overlying the semiconductor wafer and the enclosed space to prevent the semiconductor wafer from jumping.
CLEANING SHEET, TRANSFER MEMBER PROVIDED WITH CLEANING FUNCTION, AND METHOD OF PRODUCING CLEANING SHEET
Provided is a cleaning sheet excellent in cleanliness, foreign particle-removing performance, and transfer performance. The cleaning sheet includes a cleaning layer. The cleaning layer contains a polyimide-based resin. The cleaning layer has an amount of a metal transferred to a silicon wafer of 110.sup.11 atoms/cm.sup.2 or less, which is measured by a total reflection X-ray fluorescence analysis method.
Semiconductor device and methods of making and using an enhanced carrier to reduce electrostatic discharge
A semiconductor device is made with a boat carrier including stainless steel. A Polytetrafluoroethylene (PTFE) layer is formed over the boat carrier. A semiconductor package substrate is disposed over the boat carrier. A manufacturing step is performed on the semiconductor package substrate. An electrostatic discharge (ESD) is imparted on the boat carrier during the manufacturing step. The semiconductor package substrate is protected from the ESD by the PTFE layer.
Plasma processing apparatus and manufacturing method of wafer stage for plasma processing apparatus
A plasma processing apparatus including a metallic base material disposed inside a wafer stage and having a cylindrical shape or a circular plate shape; a dielectric film disposed on an upper surface of the base material; a film-shaped heater disposed inside the dielectric film; a refrigerant flow path disposed in a concentric shape or in a spiral shape about a center of the base material in the base material and allowing a refrigerant to flow therethrough; and at least one arc-shaped space multiply disposed about the center in the base material between the refrigerant flow path and the heater and having an inside reduced to a predetermined degree of vacuum and sealed. A region of a portion of the base material between the disposed arc-shaped spaces is projected and overlapped on a region of an intermediate portion of the base material that partitions two of the adjacent refrigerant flow paths.
SUBSTRATE PROCESSING APPARATUS
The present invention has an upper surface protecting/heating mechanism that heats a substrate while covering an upper surface of the substrate held by the substrate holder. In the upper surface protecting/heating mechanism, a base block, a first under block and a second under block are combined to form a clearance region and an annular air outlet. Gas flowing in the clearance region is heated by a peripheral edge heating part and then supplied from the annular air outlet to the vicinity of the peripheral edge part of the upper surface of the substrate. The peripheral edge heating part heats not only the peripheral edge part of the upper surface of the substrate but also the peripheral edge part of the substrate to a temperature suitable for the substrate processing in a short time.
PEDESTAL WITH AXIALLY SYMMETRIC EDGE PURGE PLENUM
This disclosure pertains to pedestal assemblies for supporting wafers in semiconductor manufacturing tools and chambers. Such pedestal assemblies may have an edge purge system that includes an axially symmetric first plenum volume that includes at 2024/073447 least a first radial sub-volume, a first axial sub-volume, and a second radial sub-volume. The first axial sub-volume may be fluidically interposed between the first radial sub-volume and the second radial sub-volume. An optional second plenum volume may be provided as well and may be used to fluidically connect a region of a wafer support that is part of the pedestal assembly with a vacuum port to allow the wafer support to provide vacuum clamping functionality.
WO