A method for producing an SMD power semiconductor component module includes providing an SMD circuit carrier equipped with contact points and an insulation, and at least one discrete power semiconductor component equipped with electrically conductive connection elements, preferably connection legs. The at least one discrete power semiconductor component, equipped with electrically conductive connection elements, is arranged on the side of the SMD circuit carrier equipped with the contact points. The connection elements of the power semiconductor component contact the contact points of the SMD circuit carrier, and the connection elements are connected to the respectively assigned contact points by laser welding.

A chip is assembled on an interconnection substrate. A heat dissipation layer made of a thermal interface material is deposited on the chip. A cap is bonded to the substrate with the cap covering the chip and the heat dissipation layer contacting with the cap. An element made of an adhesive material or a solderable material is formed on the chip prior to depositing the heat dissipation layer, or formed on the cap prior to bonding the cap. The element is thus in contact with the cap and with the chip and positioned next to the heat dissipation layer.

A buffer apparatus, a preprocessing apparatus, a mounting apparatus, a preprocessing method and a mounting method that can reduce bonding failure due to time elapsed from preprocessing of an electronic component and a mounting board to a bonding process. The buffer apparatus of the present embodiment includes a storage 161 that stores a component supply body TW that is a workpiece which is a wafer W diced into an electronic component E attached on a tape T attached to a ring R, and a mounting board BW that is a workpiece on which the electronic component E released from the component supply body TW is mounted after surface processing and/or a cleaning process; a chamber 162 that houses the storage 161; and a storage adjustment unit 163 that adjusts temperature, humidity, and pressure of gas inside the storage 161 independently from the chamber 162.

A method for debonding a wafer from a bonded wafer stack is disclosed. Initially, a light-absorbing layer is placed on a carrier. A wafer is then attached to the light-absorbing layer of the carrier via an adhesive layer to form a bonded wafer stack. After processing the wafer has been processed, a light pulse from a flashlamp is applied to a non-wafer side of the carrier to heat the light-absorbing layer and the adhesive layer in order to loosen the wafer from the bonded wafer stack. Finally, the wafer is removed from the bonded wafer stack.

A chip package structure includes an assembly containing an interposer and semiconductor dies; a packaging substrate attached to the assembly through solder material portions; and a lid structure attached to the packaging substrate. The lid structure includes: a first plate portion having a first thickness and located in an interposer-projection region having an areal overlap with the interposer in a plan view; a second plate portion having a second thickness that is less than the first thickness, laterally surrounding, and adjoined to, the first plate portion, and located outside the interposer-projection region; and a plurality of foot portions adjoined to the second plate portion, laterally spaced from the first plate portion, and attached to a respective top surface segment of the packaging substrate through a respective adhesive portion.

A bonding apparatus includes a first holder, a second holder, a moving unit, a housing, an interferometer, a first gas supply and a second gas supply. The first holder is configured to attract and hold a first substrate. The second holder is configured to attract and hold a second substrate. The moving unit is configured to move a first one of the first holder and the second holder in a horizontal direction with respect to a second one thereof. The interferometer is configured to radiate light to the first one or an object moved along with the first one to measure a horizontal distance thereto. The first gas supply is configured to supply a clean first gas to an inside of the housing. The second gas supply is configured to supply a second gas to a space between the interferometer and the first one or the object.

A stacked semiconductor device is disclosed that includes a plurality of semiconductor dies. Each die has oppositely disposed first and second surfaces, with pads formed on each of the surfaces. A plurality of through-vias connect respective pads on the first surface to respective pads on the second surface. The through-vias include a first group of through-vias coupled to respective I/O circuitry on the semiconductor die and a second group of through-vias not coupled to I/O circuitry on the semiconductor die. The plurality of semiconductor dies are stacked such that the first group of through-vias in a first one of the plurality of semiconductor dies are aligned with respective ones of at least a portion of the second group of through-vias in a second one of the plurality of semiconductor dies.

An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.

A quantum device includes a quantum chip, an interposer including a first wiring layer over which the quantum chip is mounted, a socket disposed to face the first wiring layer and including a plurality of terminals, and a board having a second wiring layer facing the first wiring layer. Each of the plurality of terminals electrically connects the first wiring layer and the second wiring layer, the socket includes a recessed unit housing the quantum chip, and the recessed unit has a first metal surface covering at least a part of the quantum chip.

A method for producing electronic devices includes attaching a protective grid to a first substrate, where the grid includes a set of patterns each associated with a device. Walls are molded on the first substrate to form at least one set of peripheral walls of the devices. A set structure including the first substrate, the grid and the walls is attached to a second substrate. An assembly formed by the set structure and the second substrate is cut, depending on the peripheral walls, into individual devices. When attaching the grid to the first substrate, an electrical contact is established between each pattern and an element of the first substrate. Attaching the set structure to the second substrate includes establishing an electrical contact between each pattern and an element of the second substrate.