This disclosure relates to the process of etching and treatment of side walls while processing microdevices. One aspect is to fill the device wall indentation with a polymer. The disclosure relates to a method and device with its structure to the process of etching and treatment of sidewalls. The methods of etching, coating, and curing are used.

A manufacturing method of a semiconductor structure includes the following steps. A silicon substrate is provided, and a patterning process is performed to the silicon substrate for forming first trenches in the silicon substrate. A part of the silicon substrate is patterned to be a first fin-shaped structure located between two of the first trenches adjacent to each other in a horizontal direction by the patterning process, and a top corner of the first fin-shaped structure protrudes outwards in the horizontal direction. An oxidation process is performed to the first fin-shaped structure, and a part of the first fin-shaped structure is oxidized to be an oxide layer by the oxidation process. A removing process is performed for removing the oxide layer, and the top corner of the first fin-shaped structure becomes a curved sidewall via the oxidation process and the removing process.

Embodiments of present invention provide a semiconductor structure. The structure includes a metal via having a substantially hyperboloid exterior shape; and a dielectric layer surrounding the metal via, where the metal via includes a bottom portion and a top portion; the top portion includes an outer liner and an inner liner at sidewalls thereof; and the bottom portion is directly surrounded by the dielectric layer. A method of forming the same is also provided.

Methods of depositing a liner layer in a semiconductor device are described. In some embodiments, the method includes depositing a carbon layer including carbon on a substrate, the substrate having at least one feature including a sidewall surface and the carbon layer having a carbon surface; and selectively depositing the liner layer on the sidewall surface over the carbon surface. In other embodiments, the method includes depositing a carbon layer comprising carbon in a bottom second portion of a substrate feature selectively over a top first portion of the substrate feature, the top first portion having a sidewall surface, the carbon layer having a carbon surface; etching the carbon surface; and depositing the conformal layer on the sidewall surface of the top first portion, the conformal layer deposited on the sidewall surface selectively over the carbon surface.

An exemplary method according to the present disclosure includes forming a first dielectric layer over a first conductive feature, forming a second dielectric layer over the first dielectric layer, forming a patterned mask over the second dielectric layer, performing a first etching process to form a trench extending through the first dielectric layer and the second dielectric layer to expose a top surface of the first conductive feature, where etchant of the first etching process modifies a portion of the first dielectric layer exposed by the trench, performing a second etching process to remove the patterned mask and the modified portion of the first dielectric layer, where etchant of the second etching process further reacts with a part of a remaining portion of the first dielectric layer to cause a volume expansion of the remaining portion of the first dielectric layer, and forming a second conductive feature in the trench.

A method includes forming a trench in a semiconductor layer of a device wafer and depositing a liner on the trench sidewalls. The liner is removed from the trench bottom, and the trench is deepened anisotropically to form an extension fully along the trench, or locally by applying a mask. The semiconductor material is removed outwardly from the extension by etching to create a cavity wider than the trench and below the liner. A space formed by the trench and cavity is filled with electrically conductive material to form a buried interconnect rail comprising a narrow portion in the trench and a wider portion in the cavity. The wider portion can be contacted by a TSV connection, enabling a contact area between the connection and buried rail. The etching forms a wider rail portion at a location remote from active devices formed on the front surface of the semiconductor layer.

A device comprises a non-insulator structure, a dielectric layer, a metal via, a metal line, and a dielectric structure. The dielectric layer is over the non-insulator structure. The metal via is in a lower portion of the dielectric layer. The metal line is in an upper portion of the dielectric layer. The dielectric structure is embedded in a recessed region in the lower portion of the dielectric layer. The dielectric structure has a tapered top portion interfacing the metal via.

An isolator includes a substrate; a first insulating film on the substrate; a second insulating film on the first insulating film, a third insulating film on the second insulating film, a first interconnect in the second insulating film, and first and second coils. The first interconnect has a thickness equal to a film thickness of the second insulating film. The first coil extends in the first and second insulating films. The first coil has a length in the extending direction greater than the thickness of the first interconnect. The third insulating film is provided on the second insulating film, and covers the first interconnect and the first coil. The second coil is provided on the third insulating film, and faces the first coil via the third insulating film.

Embodiments of the disclosure include a method of forming contact structure on a semiconductor substrate. The method includes treating a native oxide layer formed on a contact junction, wherein treating the native oxide layer forms a silica salt layer on the contact junction disposed within a contact feature that includes one or more surfaces that comprise silicon nitride. Then exposing the silica salt layer and the one or more surfaces to a plasma comprising oxygen, wherein the plasma forms a silicon oxynitride material on the one or more surfaces. Then removing the second silica salt layer, selectively forming a metal silicide layer on the contact junction, and then filling the contact feature with a metal, wherein filling the feature comprises selectively depositing a metal layer over the selectively formed metal silicide layer.

The present invention provides a method for forming self-transformed support plates in shallow trench isolation for advanced semiconductor devices, in which after a photolithography process to define active areas on a silicon substrate, an additional photomask is implemented to add a support plate patterning layer in areas where silicon will be etched during a STI etching step to form STI trenches. Tiny silicon support plates inside the STI trenches are formed after the silicon etching. These silicon support plates may provide mechanical support to hold neighboring patterned strips where the active areas are defined or neighboring active areas islands, and preventing them from bending, deformed or shifting. An alignment of photomask pattern at following photolithography process is eased.