H10W76/47

Diode Devices Based on Superconductivity
20260107697 · 2026-04-16 ·

An electronic device (e.g., a diode) is provided that includes a substrate and a patterned layer of superconducting material disposed over the substrate. The patterned layer forms a first electrode, a second electrode, and a loop coupling the first electrode with the second electrode by a first channel and a second channel. The first channel and the second channel have different minimum widths. For a range of current magnitudes, when a magnetic field is applied to the patterned layer of superconducting material, the conductance from the first electrode to the second electrode is greater than the conductance from the second electrode to the first electrode.

WAFER-SCALE SYSTEM IN PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

A wafer-scale system in package structure includes: a silicon substrate; a plurality of functional sub-modules arranged in an array mounted on the upper surface of the silicon substrate; a warping and stress adjustment structure mounted on the upper surface of the silicon substrate at the edges of the functional sub-modules; a stress cushioning flexible member structure mounted on the upper surface of the silicon substrate at the corner heads of the functional sub-modules; edge dummy devices of different sizes mounted on the upper surface of the edge area of the silicon substrate outside the array of the functional sub-modules; and a molding layer located on the upper surface of the silicon substrate, covering the functional sub-modules, the warping and stress adjustment structure, the stress cushioning flexible member structure and edge dummy devices.

SEMICONDUCTOR PACKAGING METHOD AND SEMICONDUCTOR PACKAGE
20260123542 · 2026-04-30 ·

The present invention provides a semiconductor packaging method and a semiconductor package, in which a second semiconductor structure and a third semiconductor structure are bonded to a first semiconductor structure so as to be adjacent to each other, with a gap being left therebetween, and a fluidic insulating layer is then filled in the gap. By virtue of the fluidity, the insulating layer, as formed, has a flat surface, which can avoid the issue of significant post-bonding warpage and/or stress non-uniformity and allows the resulting semiconductor package to have improved quality and reliability.

SEMICONDUCTOR PACKAGE
20260123524 · 2026-04-30 ·

A semiconductor package includes a base structure; a semiconductor chip stack stacked on the base structure in a vertical direction and electrically connected to the base structure, and including a plurality of semiconductor chips wherein the plurality of semiconductor chips include a lowermost semiconductor chip; a dummy chip on the semiconductor chip stack; a joint film between the dummy chip and the semiconductor chip stack; a plurality of joint patterns spaced apart from the plurality of semiconductor chips on the base structure; and an encapsulant wherein the lower pads of the semiconductor chips stacked on the lowermost semiconductor chip among the plurality of semiconductor chips are in contact with the upper pads of the semiconductor chips respectively disposed therebelow.

PACKAGE STRUCTURE WITH FAN-OUT FEATURE

A package structure is provided. The package structure includes a redistribution structure, and the redistribution structure has multiple insulating layers and multiple conductive features. The package structure also includes a semiconductor die over the redistribution structure and a protective layer partially or completely surrounding the semiconductor die. The package structure further includes a conductive bump over the redistribution structure. The protective layer surrounds a lower portion of the conductive bump, and an upper portion of the conductive bump protrudes from a surface of the protective layer. The upper portion of the conductive bump has a first curved sidewall curved outwards, the lower portion has a second curved sidewall, and the first curved sidewall has a different curvature than that of the second curved sidewall. The first curved sidewall, the second curved sidewall, and the surface of the protective layer meet together.

PACKAGE STRUCTURE WITH FAN-OUT FEATURE

A package structure is provided. The package structure includes a redistribution structure, and the redistribution structure has multiple insulating layers and multiple conductive features. The package structure also includes a semiconductor die over the redistribution structure and a protective layer partially or completely surrounding the semiconductor die. The package structure further includes a conductive bump over the redistribution structure. The protective layer surrounds a lower portion of the conductive bump, and an upper portion of the conductive bump protrudes from a surface of the protective layer. The upper portion of the conductive bump has a first curved sidewall curved outwards, the lower portion has a second curved sidewall, and the first curved sidewall has a different curvature than that of the second curved sidewall. The first curved sidewall, the second curved sidewall, and the surface of the protective layer meet together.

Semiconductor package having cooling systems with flow control devices within substrates

Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

Semiconductor module
12622315 · 2026-05-05 · ·

A semiconductor module includes: a mounting substrate including a mounting surface; a semiconductor element disposed on the mounting surface; a housing for the semiconductor element; a lid fixed to the housing and facing the mounting surface; an insulating sealing material disposed in a space inside the housing and sealing the semiconductor element; and a first adsorbent disposed between the lid and the insulating sealing material and is swollen by adsorption.

Semiconductor module
12622315 · 2026-05-05 · ·

A semiconductor module includes: a mounting substrate including a mounting surface; a semiconductor element disposed on the mounting surface; a housing for the semiconductor element; a lid fixed to the housing and facing the mounting surface; an insulating sealing material disposed in a space inside the housing and sealing the semiconductor element; and a first adsorbent disposed between the lid and the insulating sealing material and is swollen by adsorption.