Patent classifications
H10W70/682
SYSTEMS AND METHODS FOR SEMICONDUCTOR PACKAGING USING PRINTED CIRCUIT BOARD (PCB) CAVITY INTEGRATION
The subject technology is directed to a semiconductor device and methods for its fabrication and use. In an embodiment, the subject technology provides a semiconductor device that comprises a substrate having a first side and a second side. The second side comprises a cavity. A first circuit is coupled to the first side of the substrate and is characterized by a first thickness. A second circuit, comprising an RF component, is positioned within the cavity on the second side of the substrate and is characterized by a second thickness greater than the first thickness. The cavity is characterized by a first depth less than or equal to the second thickness. This configuration allows the RF component to be embedded within the substrate, optimizing the device's height and improving space utilization for compact electronic devices. There are other embodiments as well.
CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE COMPRISING SAME
A circuit board according to an embodiment includes a first insulating layer; a second insulating layer disposed on the first insulating layer; a third insulating layer disposed on the second insulating layer; a fourth insulating layer embedded in the third insulating layer; and a fifth insulating layer disposed on the third insulating layer, wherein the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer are provided with different materials, wherein the second insulating layer and the fifth insulating layer are provided with a same material, and a thickness in a vertical direction between an upper surface of the fourth insulating layer and an upper surface of the third insulating layer is smaller than a thickness of the second insulating layer in the vertical direction.