A semiconductor package includes a metallic pad and leads, a semiconductor die including a semiconductor substrate attached to the metallic pad, and a conductor including a sacrificial fuse element above the semiconductor substrate, the sacrificial fuse element being electrically coupled between one of the leads and at least one terminal of the semiconductor die, a shock-absorbing material over a profile of the sacrificial fuse element, and mold compound covering the semiconductor die, the conductor, and the shock-absorbing material, and partially covering the metallic pad and leads, with the metallic pad and the leads exposed on an outer surface of the semiconductor package. Either a glass transition temperature of the shock-absorbing material or a melting point of the shock-absorbing material is lower than a melting point of the conductor.

The package-on-package (POP) structure includes a first package unit of three-dimensional fan-out memory chips and a SiP package unit of the two-dimensional fan-out peripheral circuit chip. The first package unit includes: memory chips laminated in a stepped configuration; a molded substrate; wire bonding structures; a first rewiring layer; a first encapsulating layer; and first metal bumps, formed on the first rewiring layer. The SiP package unit includes: a second rewiring layer; a peripheral circuit chip; a third rewiring layer, bonded to the circuit chip; first metal connection pillars; a second encapsulating layer for the circuit chip and the first metal connection pillars; and second metal bumps on the second rewiring layer. The first metal bumps are bonded to the third rewiring layer. Integrating the two package units into the POP is enabled by three rewiring layers and the molded substrate which supports the first package unit during wire bonding process.

The present invention relates to a curable silicone composition comprising: (A) at least one organopolysiloxane having at least two alkenyl groups per molecule; (B) at least one mercapto functional organopolysiloxane having at least two thiol groups per molecule; (C) at least one photopolymerization initiator; and, (D) 2,6-di-tert-butyl-4-methylphenol (BHT), wherein the composition has a viscosity of less than 200 mPa.Math.s at 25 C.

A condensation curable gel composition is disclosed. The composition comprises: (i) at least one condensation curable silyl terminated polymer having at least one hydrolysable and/or hydroxyl functional group(s) per molecule; (ii) a cross-linker selected from the group of a silicone, an organic polymer, a monosilane or a disilane molecule which contains at least two hydrolysable groups per molecule; and (iii) a condensation catalyst selected from the group of titanates, zirconates or tin (II). The molar ratio of hydroxyl and/or hydrolysable groups in polymer (i) to hydrolysable groups from component (ii) is between 0.5:1 and 1:1 using a monosilane cross-linker or 0.75:1 to 3:1 using disilanes. The titanates and zirconates comprise M-OR functions where M is titanium or zirconium and R is an aliphatic hydrocarbon group. The molar ratio of M-OR or tin (II) functions to the hydroxyl and/or hydrolysable groups in polymer (i) is comprised between 0.01:1 and 0.5:1.

A semiconductor device includes a substrate having a semiconductor chip mounted thereon, a heat dissipation plate having a front surface on which the substrate is disposed, a case including a side wall disposed on the front surface of the heat dissipation plate so as to surround a housing space accommodating the substrate therein together with the heat dissipation plate and a lid disposed on the side wall to cover the housing space, and a sealing member filling the housing space to seal the substrate. The lid has a through hole and a projection (or a groove) provided on the inner surface of the lid, configured to surround the through hole so as not to contact the sealing member such that the projection forms a plurality of circumferential patterns around the through hole in plan view.

The present invention relates to a semiconductor device including: a semiconductor substrate having: an active region through which a main current flows; and a termination region around the active region; a polyimide film disposed in the active region and the termination region; and a passivation film disposed as a film underlying the polyimide film, wherein the termination region includes, in order from a side of the active region, a breakdown voltage holding region and an outermost peripheral region, the polyimide film is disposed except for a dicing remaining portion of the outermost peripheral region, and the passivation film is disposed, as the underlying film, at least in a region where the polyimide film is disposed.

In an embodiment of the present inventive concept, a high bandwidth memory includes a base die, and a semiconductor stack disposed on the base die, the semiconductor stack comprising a plurality of underfill members and a plurality of memory dies that are alternately stacked. Each of the plurality of underfill members includes first sides, each of the plurality of memory dies includes second sides, and each of the first sides is recessed from a corresponding second side.

A seal material for a semiconductor manufacturing device is made of a rubber composition containing fluororubber and phenol resin powder. The content of the phenol resin powder is 1 part by mass or more and 50 parts by mass or less with respect to 100 parts by mass of the fluororubber. The average particle size of the phenol resin powder is 1 m or more and 20 m or less.

Semiconductor devices including one or more interfacing segments patterned within an outer protective layer and associated systems and methods are disclosed herein. The one or more interfacing segments may provide attachment interfaces/surfaces for connection pads. The one or more interfacing segments or a portion thereof may remain uncovered or exposed and provide warpage control for the corresponding semiconductor device.

The present application provides a display device. The display device includes a display panel and an impact-resistance layer. The impact-resistance layer includes at least two sub-layers, two adjacent sub-layers of the sub-layers are bonded by an adhesive layer, the at least two sub-layers includes a first sub-layer and a second sub-layer between the first sub-layer and the display panel, the ratio of the elastic modulus of the first sub-layer to the elastic modulus of the second sub-layer is 20 to 300, and the material of the first sub-layer is different from the material of the second sub-layer.