H10P52/403

LOW CORROSION HIGH REMOVAL RATE COMPOSITION FOR TUNGSTEN AND MOLYBDENUM CMP

A chemical mechanical polishing composition comprises, consists of, or consists essentially of a liquid carrier, colloidal silica particles dispersed in the liquid carrier; an iron-containing polishing accelerator; a stabilizer bound to the iron-containing polishing accelerator; an alkyl-N-oxide compound including an alkyl group having at least 8 carbon atoms; and a pH of less than about 4.

Soluble Metal Oxide Anion CMP Slurry
20260055301 · 2026-02-26 ·

The invention provides a chemical mechanical polishing solution for metal and metal nitride substrates comprising: a solvent; at least one abrasive with a Mohs hardness of at least 8; and at least one soluble metal oxide anion wherein the metal is selected from vanadium, niobium, tantalum, chromium, molybdenum and tungsten.

Method of removing barrier layer

Embodiments of the present invention provide a method for removing a barrier layer of a metal interconnection on a wafer, which remove a single-layer metal ruthenium barrier layer. A method comprises: oxidizing step, is to oxidize the single-layer metal ruthenium barrier layer into a ruthenium oxide layer by electrochemical anodic oxidation process; oxide layer etching step, is to etch the ruthenium oxide layer with etching liquid to remove the ruthenium oxide layer. The present invention also provides a method for removing a barrier layer of a metal interconnection on a wafer, using in a structure of a process node of 10 nm and below, wherein the structure comprises a substrate, a dielectric layer, a barrier layer and a metal layer, the dielectric layer is deposited on the substrate and recessed areas are formed on the dielectric layer, the barrier layer is deposited on the dielectric layer, the metal layer is deposited on the barrier layer, wherein the metal layer is a copper layer, the barrier layer is a single-layer metal ruthenium layer, and the method comprises: thinning step, is to thin the metal layer; removing step, is to remove the metal layer; oxidizing step, is to oxidize the barrier layer, and the oxidizing step uses an electrochemical anodic oxidation process; oxide layer etching step, is to etch the oxidized barrier layer.

Profile control during polishing of a stack of adjacent conductive layers

During polishing of a stack of adjacent conductive layers on a substrate, an in-situ eddy current monitoring system measures sequence of characterizing values. A polishing rate is repeatedly calculated from the sequence of characterizing values repeatedly, one or more adjustments for one or more polishing parameters are repeatedly calculated based on a current polishing rate using a first control algorithm for an initial time period, a change in the polishing rate that meets at least one first predetermined criterion that indicates exposure of the underlying conductive layer is detected, and one or more adjustments for one or more polishing parameters are calculated based on the polishing rate using a different second control algorithm for a subsequent time period after detecting the change in the polishing rate.

Polishing pad and preparing method of semiconductor device using the same

The present disclosure is to provide a polishing pad which is capable of providing physical properties corresponding to various polishing purposes for various polishing objects through the subdivided structural design in a thickness direction, and of securing environmental friendliness by applying a recycled or recyclable material to at least some components, in relation to disposal after use, unlike the conventional polishing pad. Specifically, the polishing pad includes a polishing layer, wherein the polishing layer includes a polishing variable layer having a polishing surface; and a polishing constant layer disposed on a rear surface side of the polishing variable layer opposite to the polishing surface, and wherein the polishing constant layer includes a cured product of a composition having thermosetting polyurethane particles and a binder.

Semiconductor structure and forming method thereof

A semiconductor structure and forming method thereof are provided. The semiconductor structure includes a substrate, a gate dielectric, a gate electrode and dielectric structures. The gate dielectric has a top surface aligned with a top surface of the substrate. The gate electrode is disposed over the substrate and overlaps the gate dielectric. The gate electrode has first segments extending in parallel along a direction. The dielectric structures are disposed over the substrate, overlap the gate dielectric and extend in parallel along the direction. The dielectric structures and the first segments are arranged in an alternating pattern.

POLISHING COMPOSITION FOR SEMICONDUCTOR PROCESS AND METHOD FOR POLISHING SUBSTRATE USING SAME
20260049239 · 2026-02-19 · ·

The polishing composition for semiconductor process includes polishing particles, wherein an Rps value calculated by the following Formula 1 is 0.5 to 2:

[00001] Rps = Ap As [ Formula 1 ] in [Formula 1], Ap is a specific surface area of a micropore of the polishing particles, and As is a specific surface area of an external surface of the polishing particles.

CMP slurry composition for polishing tungsten pattern wafer and method of polishing tungsten pattern wafer using the same

A CMP slurry composition for polishing a tungsten pattern wafer and a method of polishing a tungsten pattern wafer, the CMP slurry composition includes a solvent; an abrasive agent containing silica modified with a silane compound having at least one nitrogen atom; and an alkylene oxide group-containing fluorine surfactant.

Polishing pad and substrate processing apparatus including the same

A substrate processing apparatus includes a polishing platen including a fluid channel, a polishing pad provided on a first surface of the polishing platen, the polishing pad including a pad body including a trench and a thermal conductive body provided in the trench of the pad body and connected to the first surface of the polishing platen, and a polishing head provided on the polishing pad and configured to support a substrate.

Forming a partially silicided element
12557569 · 2026-02-17 · ·

A method of forming a partially silicided element is provided. A silicided structure including a silicide layer on a base structure is formed. A dielectric region is formed over the silicided structure. The dielectric region is etched to form a contact opening exposing a first area of the silicide layer and a tub opening exposing a second area of the silicide layer. A conformal metal is deposited to (a) fill the contact opening to define a contact and (b) form a cup-shaped metal structure in the tub opening. Another etch is performed to remove the cup-shaped metal structure in the tub opening, to remove the underlying silicide layer second area and to expose an underlying area of the base structure, wherein the silicide layer first area remains intact. The base structure with the intact silicide layer first area and removed silicide layer second area defines the partially silicided element.