A resin enclosure includes: an inner wall portion from a wall surface defining the space to a side surface of the lead terminal close to the space; and a covering portion that covers at least a part of a top surface of a first portion of the lead terminal.

Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.

A method for making a semiconductor device is provided. The method includes: providing a package including: a substrate including a top surface and a bottom surface; a top electronic component mounted on the top surface of the substrate; at least one conductive pillar formed on the bottom surface of the substrate; and a protection layer attached on the bottom surface of the substrate and covering the at least one conductive pillar; providing a molding apparatus including a top chase and a bottom chase, wherein a molding material is held in the bottom chase; attaching the protection layer onto the top chase of the molding apparatus; and moving the top chase and the bottom chase close to each other to compress the molding material to cover the top electronic component on the top surface of the substrate, thereby forming a top encapsulation on the top surface of the substrate.

A semiconductor device assembly is provided. The assembly includes an outer semiconductor device which has an active surface and a back surface. The back surface includes a cut that extends to a depth between the active surface and the back surface, and uncut regions on opposing sides of the cut. The assembly further includes an inner semiconductor device disposed within the cut of the outer semiconductor device.

In one example, an electronic device, comprises a substrate comprising a dielectric structure and a conductive structure, an electronic component over a top side of the substrate, wherein the electronic component is coupled with the conductive structure; an encapsulant over the top side of the substrate and contacting a lateral side of the electronic component, wherein the encapsulant comprises a first trench on a top side of the encapsulant adjacent to the electronic component, a lid over the top side of the encapsulant and covering the electronic component; and an interface material between the top side of the encapsulant and the lid, and in the first trench. Other examples and related methods are also disclosed herein.

A package structure including a semiconductor die, a redistribution layer structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution layer structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution layer structure includes a backside dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the backside dielectric layer and the inter-dielectric layers. The electronic device is disposed over the backside dielectric layer and electrically connected to an outermost redistribution conductive layer among the redistribution conductive layers, wherein the outermost redistribution conductive layer is embedded in the backside dielectric layer, and the backside dielectric layer comprises a ring-shaped recess covered by the outermost redistribution conductive layer.

A semiconductor device of embodiments includes: a die pad; a semiconductor chip fixed on the die pad; and a sealing resin covering the semiconductor chip and at least a part of the die pad. The sealing resin has a first protruding portion provided on one side surface and a second protruding portion provided on another side surface. The cross-sectional area of the first protruding portion is equal to or more than 10% of the maximum cross-sectional area of the sealing resin. The cross-sectional area of the second protruding portion is equal to or more than 10%; of the maximum cross-sectional area. The maximum cross-sectional area is equal to or more than 6 mm.sup.2.

A semiconductor device of embodiments includes: a die pad; a semiconductor chip fixed on the die pad; and a sealing resin covering the semiconductor chip and at least a part of the die pad. The sealing resin has a first protruding portion provided on one side surface and a second protruding portion provided on another side surface. The cross-sectional area of the first protruding portion is equal to or more than 10% of the maximum cross-sectional area of the sealing resin. The cross-sectional area of the second protruding portion is equal to or more than 10%; of the maximum cross-sectional area. The maximum cross-sectional area is equal to or more than 6 mm.sup.2.

As an example of a semiconductor device is disclosed. The semiconductor device 1 includes a semiconductor die 3 and a wiring layer 5a to which the semiconductor die 3 is attached. The semiconductor die 3 includes a semiconductor substrate 3a having a first surface and a second surface opposite thereto, a plurality of terminal electrodes 3b provided on the first surface of the semiconductor substrate 3a, and a cured resin layer 3c. The cured resin layer 3c is provided on the first surface of the semiconductor substrate 3a so as to cover the plurality of terminal electrodes 3c. The semiconductor die 3 can be, for example, a bride die that connects a semiconductor die 2a and a semiconductor die 2b to each other.

A method of forming an integrated circuit (IC) is provided. The method includes forming a seed layer of a first metal material over a circuit on a device side of a semiconductor die. The method also includes forming a multi-layer conductive contact on the seed layer. The multi-layer conductive contact has a width in a first dimension and includes a plurality of layers of different metal materials and a portion of the seed layer extends outwardly from a periphery of the multi-layer conductive contact. The method further includes forming a sacrificial layer of the first metal material over the multi-layer conductive contact. The method yet further includes etching to remove the seed layer and the sacrificial layer.