H10W72/527

SEMICONDUCTOR PACKAGE
20260101817 · 2026-04-09 ·

A semiconductor package includes a substrate, a first semiconductor die disposed on the substrate, a second semiconductor die stacked on the first die and offset from it in a first direction and a second direction that are perpendicular to each other, and a third semiconductor die stacked on the first and second dies and offset from them in the first direction. The first semiconductor die includes a first pad and a second pad, arranged successively in the second direction. The second semiconductor die includes a third pad and a fourth pad, and the third semiconductor die includes a fifth pad and a sixth pad, each arranged successively in the second direction. A first conductive pattern connects the first and fifth pads, while a second conductive pattern connects the second, fourth, and sixth pads. The first and second conductive patterns are spaced apart from the third pad.

ELECTRONIC PACKAGE

An electronic package is provided, in which an electronic element is arranged on a carrier structure having a plurality of wire-bonding pads arranged on a surface of the carrier structure, and a plurality of bonding wires are connected to a plurality of electrode pads of the electronic element and the plurality of wire-bonding pads. Further, among any three adjacent ones of the plurality of wire-bonding pads, a long-distanced first wire-bonding pad, a middle-distanced second wire-bonding pad and a short-distanced third wire-bonding pad are defined according to their distances from the electronic element. Therefore, even if the bonding wires on the first to third wire-bonding pads are impacted by an adhesive where a wire sweep phenomenon occurred when the flowing adhesive of a packaging layer covers the electronic element and the bonding wires, the bonding wires still would not contact each other, thereby avoiding short circuit problems.

POWER MODULE PACKAGE
20260123460 · 2026-04-30 ·

A power module is provided. The power module includes a first lead frame, a first die, a substrate, a second lead frame, and a second die. The first lead frame has a first part and a second part. The first die is arranged on top of the first part of the first lead frame. A first power device is formed on the first die. The substrate is arranged on top of the second part of the first lead frame. The second lead frame is arranged on top of the substrate. The second die is arranged on top of the second lead frame. A first control circuit is formed on the second die, and the first control circuit is configured to control the first power device.

WIRE-BOND STRUCTURE FOR POWER PACKAGES TO REDUCE RDSON
20260123506 · 2026-04-30 · ·

A semiconductor device, a semiconductor package including such a semiconductor device and a method of manufacturing such a semiconductor package are presented. The semiconductor device includes a die and a leadframe. The semiconductor device further includes a wire-bond interconnect structure including one or more pairs of wires. Herein, a pair of wires includes two wires that are bonded together at one end at the die and that are bonded together on the other end at the leadframe.

Electronic package, package substrate and manufacturing method thereof
12628651 · 2026-05-12 · ·

An electronic package is provided, including a package substrate in which a circuit layer and a surface treatment layer are embedded in an insulating portion, and the surface treatment layer is coupled to a top surface of the circuit layer, but is not formed on a side surface of the circuit layer. Therefore, the circuit layer can maintain the original predetermined line spacing so that it is beneficial to be designed with fine line spacing/line width.