A stack of first semiconductor layers and second semiconductor layers is formed. The first semiconductor layers each have a first material composition. The second semiconductor layers each have a second material composition different from the first material composition. The first semiconductor layers interleave with the second semiconductor layers in the stack. The second semiconductor layers are replaced with a plurality of dielectric layers. Source/drain features are formed on opposite sides of the first semiconductor layers, such that junctions are formed between the source/drain features and the first semiconductor layers. One or more annealing processes are performed. At least one of the one or more annealing processes facilitates a push of the junction toward the first semiconductor layers.

The present disclosure relates to an oxide semiconductor memory device and a manufacturing method thereof, and more particularly, to an oxide semiconductor memory device forming an amorphous indium-gallium-zinc-oxide (hereinafter, referred to as a-IGZO) thin film and a manufacturing method thereof. The present disclosure is to solve a problem of oxide semiconductor forming an a-IGZO thin film having a negative threshold voltage and improve mobility characteristics.

A semiconductor device manufacturing method includes forming a tin-containing oxide film on a gallium-oxide-based compound; irradiating the tin-containing oxide film with ultraviolet laser light to dope the gallium-oxide-based compound with tin; and forming a metal electrode on the tin-containing oxide film irradiated with the ultraviolet laser light.

A super junction device may be formed by decreasing the width of the P-type region and increasing the doping concentration, allowing for an increased height of the device. However, instead of etching a trench to fill with the P-type material, a trench may be etched for both the P-type and adjacent N-type regions. This allows the height of the device to be increased while maintaining a feasible aspect ratio for the trench. The P-type material may be formed on the sidewall on the trench to be relatively thin. The trench may then be filled with N-type material such that the P-type region fills the space between the N-type regions without any voids or seams, while having a width that would be unattainable using traditional etch-and-fill methods for the P-type region alone. Wide bandgap materials may also be used to increase the voltage rating.

Disclosed is a semiconductor doping method, and the semiconductor doping method includes: forming a molybdenum disulfide (MoS.sub.2) layer on a substrate; sputtering and depositing an aluminum nitride (AlOxNy) thin film on a surface of the molybdenum disulfide (MoS.sub.2) layer; and injecting electrons into the molybdenum disulfide (MoS.sub.2) through the deposition of the aluminum nitride (AlOxNy) thin film.

Provided is a method for manufacturing a metal-oxide thin-film transistor (TFT). The method includes: forming, on a base substrate, an active layer including a metal oxide semiconductor, and a functional layer laminated on the active layer and containing a lanthanide element; and annealing the active layer and the functional layer, such that the lanthanide element in the functional layer is diffused into the active layer.

According to some embodiments of the present disclosure, methods of forming a semiconductor device on a semiconductor layer having opposing first and second surfaces are disclosed. An n-type doped region including an n-type dopant may be formed at the first surface of the semiconductor layer. A p-type dopant source layer including a p-type dopant may be formed on the n-type doped region. The p-type dopant may be diffused from the p-type dopant source layer through the n-type doped region into the semiconductor layer to form a p-type doped region of the semiconductor layer, and the p-type doped region of the semiconductor layer may be between the n-type doped region and the second surface of the semiconductor layer. After diffusing the p-type dopant, the p-type dopant source layer may be removed.

A method for manufacturing semiconductor device according to an embodiment includes: forming a first metal oxide layer containing aluminum as a main component above a substrate; forming an oxide semiconductor layer above the first metal oxide layer; forming a gate insulating layer above the oxide semiconductor layer; forming a second metal oxide layer containing aluminum as a main component above the gate insulating layer; performing a heat treatment in a state where the second metal oxide layer is formed above the gate insulating layer; removing the second metal oxide layer after the heat treatment; and forming a gate electrode above the gate insulating layer.