Patent classifications
H10W90/726
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING A SEMICONDUCTOR PACKAGE STRUCTURE
A semiconductor package structure includes a substrate, a redistribution layer, a first semiconductor die, a second semiconductor die, a first thermal interface material (TIM) film, a second TIM film, and a heat-dissipating lid. The redistribution layer is attached to the substrate. The first semiconductor die and the second semiconductor die are disposed over the redistribution layer. The first TIM film is formed over the first semiconductor die. The second TIM film is formed over the second semiconductor die. The heat-dissipating lid is attached to the substrate. The heat-dissipating lid has first regions with a first cavity depth and a second region with a second cavity depth. The second cavity depth is greater than the first cavity depth. The second TIM film is disposed in the second region of the heat-dissipating lid.
MICROELECTRONIC DEVICE PACKAGE WITH SHAPED END TERMINALS AND METHODS
A described example apparatus includes: at least one semiconductor die mounted on a die pad of a package substrate having a first thickness, the package substrate having a device side layer of a second thickness less than the first thickness and having a board side layer of a third thickness less than the first thickness; electrical connections between bond pads and leads formed in the device side layer, the leads connected to corresponding terminals formed in the board side layer; and mold compound covering the device side layer, the electrical connections, and the at least one semiconductor die, the terminals having a board side surface exposed from the mold compound and having a tail portion having a first width, a central portion extending towards the die pad having a second width greater than the first width, and a tapered portion that connects the central portion to the tail portion.
LIQUID COOLING FOR INTEGRATED CIRCUIT PACKAGES
Thermally conductive structures extending from a surface of an integrated circuit component toward an inner surface of a lid structure are described for use in liquid cooling thermal management solutions. An integrated circuit assembly includes a substrate, one or more components on the substrate, and a lid structure over the components. The lid structure includes a top portion and a sidewall that, with the substrate, define a cavity to receive coolant. Inlet and outlet ports extend through the top portion to route coolant through the cavity. Thermally conductive structures in the cavity extend from the component surface toward the top portion inner surface to increase heat-transfer area and reduce thermal resistance. The structures may include solder bodies, metal pins, pillars with solder bodies, patterned solder layers, or combinations thereof. Multi-component implementations include a single lid defining multiple cavities separated by an internal sidewall.
Package with dual layer routing including ground return path
A package includes a first leadframe including a plurality of leads and a conductor, a first semiconductor die mounted on a first surface of the first leadframe and attached to a first subset of the plurality of leads and the conductor, and a second semiconductor die mounted on the first surface of the first leadframe and attached a second subset of the plurality of leads and the conductor. The conductor provides a direct electrical connection for an electrical signal between the first semiconductor die and the second semiconductor die. The package further includes a second leadframe. The first leadframe is mounted on the second leadframe via a second surface of the first leadframe, the second surface opposite the first surface. The second leadframe provides a ground return path between the between the first semiconductor die and the second semiconductor die for the electrical signal.
Package with Epitaxial Layer of Electronic Component Spaced from a Front-side Connection Body by less than 50 μm
A package includes an at least partially electrically conductive front-side connection body and an electronic component having an epitaxial layer and being assembled with the front-side connection body. A distance between the epitaxial layer and the front-side connection body is less than 50 m. A method of manufacturing the package is also described.