Described are semiconductor devices, e.g., PMOS and/or NMOS, with improved stress in the channel region. The semiconductor devices include a substrate, a source region, a drain region, a channel extending between the source region and the drain region, and a diffusion break patterned through the device. The self-aligned diffusion break opening is gap filled a stressed dielectric material using a densified seam-free silicon-containing material gap fill process.

Techniques are provided herein to form semiconductor devices having nanowires with an increased strain. A thin layer of silicon germanium or germanium tin can be deposited over one or more suspended nanoribbons. An anneal process may then be used to drive the silicon germanium or germanium tin throughout the one or more semiconductor nanoribbons, thus forming one or more nanoribbons with a changing material composition along the lengths of the one or more nanoribbons. In some examples, at least one of the one or more nanoribbons includes a first region at one end of the nanoribbon having substantially no germanium, a second region at the other end of the nanoribbon having substantially no germanium, and a third region between the first and second regions having a substantially uniform non-zero germanium concentration. The change in material composition along the length of the nanoribbon imparts a compressive strain.

A method and apparatus for diffusing a dopant within a semiconductor device is described. The method includes performing a dynamic surface anneal in which a substrate is placed inside of a process volume with a mixture of an inert gas and a small amount of oxygen gas. The surface of the substrate is then exposed to one or more rapid laser pulses. The rapid laser bursts diffuse dopant from a doped layer into the substrate. The doped layer is formed during a previous process operation. The temperature and number of laser pulses control the amount of diffusion of the dopant into the substrate. Other dynamic surface anneal operations may be optionally performed before or after the oxygenated dynamic surface anneal operation.

Devices, transistor structures, systems, and techniques are described herein related to gate all around field effect transistors having nanoribbons selectively removed to allow for thicker gate dielectric materials. In forming an alternating stack of semiconductor and sacrificial layers, a cladding layer is applied to those semiconductor layers to be removed during nanoribbon release. Prior to nanoribbon release, atoms of the cladding layer are diffused into only those semiconductor layers having the cladding. During nanoribbon release etch, the sacrificial layers and those semiconductor layers having diffused atoms therein are removed while the semiconductor layers without cladding remain. By removing nanoribbons, an increased ribbon-to-ribbon spacing is attained for application of thicker gate dielectric materials in gate all around field effect transistors.

According to some embodiments of the present disclosure, methods of forming a semiconductor device on a semiconductor layer having opposing first and second surfaces are disclosed. An n-type doped region including an n-type dopant may be formed at the first surface of the semiconductor layer. A p-type dopant source layer including a p-type dopant may be formed on the n-type doped region. The p-type dopant may be diffused from the p-type dopant source layer through the n-type doped region into the semiconductor layer to form a p-type doped region of the semiconductor layer, and the p-type doped region of the semiconductor layer may be between the n-type doped region and the second surface of the semiconductor layer. After diffusing the p-type dopant, the p-type dopant source layer may be removed.