A transistor device includes: a plurality of transistor cells in a semiconductor substrate; and a source pad above the semiconductor substrate and electrically connected to a source region and a body region of the transistor cells. A first group of the transistor cells has a first body region average doping concentration. A second group of the transistor cells has a second body region average doping concentration higher than the first body region average doping concentration. The transistor cells of the first and second groups are interleaved. The transistor cells have a first source region density in a first area of the semiconductor substrate underneath a region of the source pad designated for clip contacting, and a second source region density lower than the first source region density in a second area of the semiconductor substrate outside the first area.

A semiconductor device, including: a semiconductor chip including an electrode on an upper surface thereof; and a wiring member including a bonding portion, a rising portion, and a connecting portion, the bonding portion being bonded to the electrode via a bonding material, the rising portion being of a shape of a flat plate and extending upward from the bonding portion, the connecting portion connecting the bonding portion to the rising portion. The rising portion includes a lower region connected to the connecting portion and an upper region located above the lower region. Both the lower region and the connecting portion have a first thickness, and the upper region has a second thickness that is larger than the first thickness.

Provided is a semiconductor module, including: a semiconductor chip; a terminal, configured to extend in a extending direction, and be connected electrically with the semiconductor chip; a sealing resin, configured to seal the semiconductor chip, and cover at least a part of an upper surface of the terminal and at least a part of a lower surface of the terminal; and a lower side resin, configured to extend in the extending direction from the sealing resin, and cover at least a part of the lower surface of the terminal, wherein in the extending direction, a length at which the sealing resin and the lower side resin cover the lower surface of the terminal is greater than a length at which the sealing resin covers the upper surface of the terminal in the extending direction; and wherein the sealing resin and the lower side resin are formed of a same material.

A semiconductor die and an electrically conductive ribbon are arranged on a substrate. The electrically conductive ribbon includes a roughened surface. An insulating encapsulation is molded onto the semiconductor die and the electrically conductive ribbon. The roughened surface of the electrically conductive ribbon provides a roughened coupling interface to the insulating encapsulation.

A semiconductor apparatus includes: a base plate; an insulating circuit board including a ceramic substrate, a circuit pattern formed on an upper surface of the ceramic substrate, a metal layer formed on a lower surface of the ceramic substrate and fixed on an upper surface of the base plate with a first joint material; a semiconductor device having a first surface fixed on the circuit pattern with a second joint material and a second surface which is an opposite surface of the first surface; a lead frame fixed on the second surface with a third joint material; and a case fixed to an outer edge portion of the base plate and enclosing the semiconductor device, wherein restoring force acts on the insulating circuit board in a direction of warpage that is convex upward, and restoring force acts on the base plate in a direction of warpage that is convex downward.

A semiconductor device includes a semiconductor chip having a first chip surface and a second chip surface, and a connector member having a bonding portion that faces the first chip surface and a connection portion. The connection portion is connected to an end portion of the bonding portion on one side in a second direction, and located on the other side in a first direction toward one side in the second direction. The bonding portion has a first bonding surface bonded to the first chip surface. A first recessed portion that is recessed on one side in the first direction and is open to the other side in the second direction is provided in the first bonding surface. A dimension of the first recessed portion in the second direction is 40% or more and 60% or less of a dimension of the bonding portion in the second direction.

A semiconductor chip has a first semiconductor layer, a second semiconductor layer formed on an upper surface of the first semiconductor layer, and a semiconductor region formed in the second semiconductor layer. A trench is formed in the semiconductor region. An insulating film is formed on each of an upper surface of the second semiconductor layer and an inner surface of the trench. A polysilicon film is formed on the insulating film so as to embed an inside of the trench. A front surface electrode made of metal is formed on the polysilicon electrode, and a back surface electrode made of metal is formed on a lower surface of the first semiconductor layer. An impurity concentration of the second semiconductor layer located between the semiconductor region and the first semiconductor layer is lower than an impurity concentration of each of the first semiconductor layer and the semiconductor region.

A semiconductor chip includes a first electrode provided farther in a first direction than the first lead frame and is electrically coupled to a first lead frame, and a second electrode. A first conductor electrically coupled to the second electrode. A second lead frame is aligned with the first lead frame at a position farther in a second direction than the first lead frame and includes a first terminal and a plate portion connected to the first terminal. The plate portion is electrically coupled to the first conductor and has an inclination over a first surface on a side in the first direction and a first side surface on a side in the second direction. A resin covers a part of the first lead frame, the semiconductor chip, the first conductor, and the plate portion and a part of the first terminal.

A reliability of a semiconductor device can be improved by measuring a value of a current flowing through a power transistor accurately. A semiconductor chip includes a power transistor and a source electrode electrically connected to a source region of the power transistor. The source electrode and a lead terminal are electrically connected to each other via a wire. The source electrode includes detection points for detecting the value of the current flowing through the power transistor. The detection points are arranged so as to sandwich a bonding point of the wire bonded to the source electrode.

An electronic component is disclosed. In one example, the electronic component comprises a semiconductor body, an active region in the semiconductor body, at least one metallization structure arranged on or above the active region and comprising a stack. The stack includes a barrier structure, an intermediate structure on the barrier structure and comprising nickel, and a copper and/or aluminium structure on the intermediate structure and comprising copper and/or aluminium. A dielectric structure is connected to a sidewall of the stack.