H10P72/7436

Chip bonding method

A die bonding method is disclosed, through coating bonding adhesive on front side of device wafer and bonding carrier wafer thereto, back-side connection structure can be formed on back side of device wafer to lead out an interconnect structure in device wafer to back side of device wafer, and dies thereon can be bonded at front sides to target wafer. Moreover, after device wafer is debonded from carrier wafer, the bonding adhesive is retained on front side of device wafer to provide protection to front side of device wafer during subsequent dicing of device wafer, and to avoid particles or etching by-products produced during dicing process from adhering to front side of device wafer. Such etching by-products are subsequently removed along with the bonding adhesive, ensuring cleanness of front sides of individual dies resulting from dicing process and improved quality of bonding of dies at front sides to target wafer.

Device and method of very high density routing used with embedded multi-die interconnect bridge

A device and method for providing enhanced bridge structures is disclosed. A set of conducting and insulating layers are deposited and lithographically processed. The conducting layers have uFLS routing. A bridge with uFLS contacts and die disposed on the underlying structure such that the die are connected with the uFLS contacts and uFLS routing. For core-based structures, the layers are formed after the bridge is placed on the underlying structure and the die connected to the bridge through intervening conductive layers. For coreless structures, the layers are formed over the bridge and carrier, which is removed prior to bonding the die to the bridge, and the die bonded directly to the bridge.

Method for manufacturing electronic component device and electronic component device
12628660 · 2026-05-12 ·

A method for manufacturing an electronic component device including: preparing a wiring structure having a wiring portion including a metal wiring and an insulating layer and having two main surfaces opposite to each other, and a connection portion provided on one of the main surfaces of the wiring portion; fixing one or more conductor pins on the wiring substrate in a state in which the one or more conductor pins stand against the connection portion; mounting one or more electronic components on the wiring structure; and forming an encapsulation layer for encapsulating the electronic component and the conductor pin on the wiring structure.