Patent classifications
H10W40/43
Stacked Chip with Liquid Cooling Plate
The present invention comprises a chip, a cooling substrate is formed over the first surface of the cooling substrate, a cooling channel is formed on the cooling substrate to dissipate the heat generated by the chip, wherein the cooling channel includes a cooling liquid or gas; a power substrate is provided and the power substrate includes a power grid to provide power to the chip from the second surface of the chip. The chip, the cooling substrate, and the power substrate are stacked together.
Stacked Chip with Liquid Cooling Plate
The present invention comprises a chip, a cooling substrate is formed over the first surface of the cooling substrate, a cooling channel is formed on the cooling substrate to dissipate the heat generated by the chip, wherein the cooling channel includes a cooling liquid or gas; a power substrate is provided and the power substrate includes a power grid to provide power to the chip from the second surface of the chip. The chip, the cooling substrate, and the power substrate are stacked together.
Semiconductor package structures and methods of forming the same
A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.
Semiconductor package structures and methods of forming the same
A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.
Packages formed using RDL-last process
A method includes bonding a first device die and a second device die to a substrate, and filling a gap between the first device die and the second device die with a gap-filling material. A top portion of the gap-filling material covers the first device die and the second device die. Vias are formed to penetrate through the top portion of the gap-filling material. The vias are electrically coupled to the first device die and the second device die. The method further includes forming redistribution lines over the gap-filling material using damascene processes, and forming electrical connectors over and electrically coupling to the redistribution lines.
SYSTEMS AND METHODS FOR LOW INDUCTANCE PHASE SWITCH FOR INVERTER FOR ELECTRIC VEHICLE
A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a power module including: a first phase switch including one or more first phase power switches on a first side of a substrate; and a second phase switch including one or more second phase power switches on a second side of the substrate opposite to the first side.
Systems and methods for three channel galvanic isolator for inverter for electric vehicle
A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: an upper phase multi-chip module including: a low-voltage upper phase controller; a high-voltage upper phase A controller; an upper phase A galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase A controller; a high-voltage upper phase B controller; an upper phase B galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase B controller; a high-voltage upper phase C controller; and an upper phase C galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase C controller.
Systems and methods for three channel galvanic isolator for inverter for electric vehicle
A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: an upper phase multi-chip module including: a low-voltage upper phase controller; a high-voltage upper phase A controller; an upper phase A galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase A controller; a high-voltage upper phase B controller; an upper phase B galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase B controller; a high-voltage upper phase C controller; and an upper phase C galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase C controller.
INTEGRATED TEMPERATURE CONTROL SYSTEM FOR SUBASSEMBLIES
Embodiments herein provide for an integrated thermal control assembly comprising: a semiconductor device; a cold plate stacked vertically adjacent to the semiconductor device; and a heater device disposed adjacent to the semiconductor device and the cold plate.