Provided in the present specification is a novel structured semiconductor light-emitting element capable of preventing an electrode forming failure due to an arrangement error occurring during assembly or transfer of semiconductor light-emitting elements on a substrate, when a display device is implemented using the semiconductor light-emitting elements, wherein at least one of a plurality of semiconductor light-emitting elements according to one embodiment of the present disclosure comprises: a first conductive type semiconductor layer; a second conductive type semiconductor layer located on the first conductive type semiconductor layer; an active layer arranged between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a second conductive type electrode located on the second conductive type semiconductor layer; and a first conductive type electrode located on at least a one-side stepped portion of the first conductive type semiconductor layer exposed by etching a portion of the second conductive type semiconductor layer and the active layer.

A method for manufacturing sinter bonding film, includes: preparing a resin formulation; preparing a metal filler mixture; mixing the resin formulation and the metal filler mixture, thereby preparing a paste for film manufacturing; and manufacturing a sinter bonding film by using the paste for film manufacturing. The metal filler mixture includes a metal powder and a reducing agent, copper metal (Cu) corresponds to respective particles in the metal powder, and the surface of the respective particles in the metal powder undergoes acid treatment or non-treatment.

A method of forming an interconnection includes: providing an electronic component having a first main face and a first metallic layer disposed on the first main face; providing an electric component having a second main face and a second metallic layer disposed on the second main face, at least one of the first or second metallic layers including an oxide layer provided on a main face thereof; disposing a reducing agent on one or both of the electronic component and the electric component such that the reducing agent is enabled to remove the oxide layer; and connecting the electronic component to the electric component by directly connecting the first metallic layer of the electronic component with the second metallic layer of the electric component by applying pressure and heat.

In a bonding process of a flip chip bonding method, a chip is bonded to contact pads of a substrate by composite bumps which each includes a raiser, a UBM layer and a bonding layer. Before the bonding process, the surface of the bonding layer facing toward the substrate is referred to as a surface to be bonded. During the bonding process, the surface to be bonded is boned to the contact pad and become a bonding surface on the contact pad. The bonding surface has an area greater than that of the surface to be bonded so as to reduce electrical impedance between the chip and the substrate.

The present invention provides a pressing method and a pressing device. The method includes: providing an object to be pressed; providing a lower pressing die that is provided with a support seat for holding the object to be pressed; providing an upper pressing die that can be driven to move up and down relative to the lower pressing die; the upper pressing die is provided with plural plungers capable being driven to move up and down and a pressing block mechanism that can be pressed by the plungers; a load measuring unit is located among the plungers and the pressing block mechanism; when the object to be pressed is pressed, the upper pressing die firstly moves down to the pressing block mechanism to press the object to be pressed and drives the plungers to press the load measuring unit, such that the applied pressure can be accurately controlled.

[Problem] To prevent formation of residues of a second adhesive on a semiconductor wafer during debonding by ensuring a low adhesion between a second support and the semiconductor wafer to prevent the two from adhering together too firmly while preventing bonding failure of a first support, even when the second support is bonded to a second surface of the semiconductor wafer.

[Means to Solve Problem] A substrate bonding device 1 includes: a bonder 10 that bonds a second support 110 to a second surface Sb, which is on an opposite side to a first surface Sa of a semiconductor wafer W, via a second adhesive 60, with the first surface Sa having a first support 100 bonded thereto at a first temperature via a first adhesive 50; and a heater 20 that heats one or both of the second support 110 and the semiconductor wafer W at a second temperature that is lower than the first temperature.

A sintering apparatus for simultaneously sintering an electronic device onto a substrate, and a metallic sheet onto the electronic device includes a sinter tool and a compressible film positionable onto the metallic sheet and the electronic device. A thickness of the compressible film is greater than a height of the metallic sheet. The compressible film is adapted to conform to a shape of the metallic sheet and the electronic device to simultaneously cover the metallic sheet and at least a part of the electronic device when the sinter tool applies a sintering force onto the compressible film during a sintering process.

The semiconductor package including a base chip, a plurality of first semiconductor chips each having a first horizontal width, and a plurality of second semiconductor chips each having a second horizontal width that is different from the first horizontal width. The plurality of first semiconductor chips and the plurality of second semiconductor chips are alternately stacked on the base chip. An adhesive layer is between adjacent semiconductor chips of the alternately stacked plurality of first semiconductor chips each of the plurality of first semiconductor chips and second semiconductor chips.

A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate, the first bonding layer including a first bonding sub-layer and a second bonding sub-layer, the first bonding sub-layer including a first metal oxide material in an amorphous state and a plurality of metal nanoparticles, the second bonding sub-layer including a second metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, the second bonding layer including a third metal oxide material in an amorphous state; conducting a surface modification process on the first and second bonding layers; bonding the device and carrier substrates to each other through the first and second bonding layers; and annealing the first and second bonding layers to convert the first, second, and third metal oxide materials from the amorphous state to a crystalline state.

A laminated structure includes a cooling member; a circuit board provided on the cooling member and having a through hole; a device provided on the circuit board and including a quantum bit; and a bonding material configured to bond together the circuit board and the device. The bonding material includes a first bonding portion contacting a portion of an upper surface of the cooling member exposed from the through hole, an upper surface of the circuit board, and a lower surface of the device; and a second bonding portion provided around the first bonding portion in plan view and contacting the upper surface of the circuit board and the lower surface of the device. A thermal conductivity of the first bonding portion is higher than that of the second bonding portion. An elastic modulus of the second bonding portion is lower than that of the first bonding portion.