An embodiment relates to a method obtaining a silicon carbide wafer comprising a first conductivity type substrate and a first conductivity type drift layer, forming a second conductivity type first well region within the first conductivity type drift layer, forming a first conductivity type source region within the second conductivity type first well region, forming a second conductivity type plug region under the first conductivity type source region, forming a gate oxide layer, forming a patterned gate metal layer, depositing an interlevel dielectric (ILD) layer, forming a first patterned mask layer on top of the ILD layer, and etching the ILD layer and the first conductivity type source region using the first patterned mask layer, and forming a silicide layer, wherein the silicide layer is in contact with a vertical sidewall of the first conductivity type source region and at-least one second conductivity type region.

A silicon carbide semiconductor device includes an active region, a first-conductivity-type region, and a termination region. The active region has first second-conductivity-type regions and first silicide films in trenches, second second-conductivity-type regions and a second silicide film between the trenches that are adjacent to one another, and a first electrode while the termination region has a third second-conductivity-type region. The active region includes ohmic regions, non-operating regions and Schottky regions, each of which has a stripe shape. Each ohmic region is a region where the first electrode is in contact with either the first silicide film or the second silicide film. Each non-operating region is a region where the first electrode is in contact with either the first or second second-conductivity-type regions. Each Schottky region is a region where the first electrode forms a Schottky barrier junction with the first-conductivity-type region.

The present description relates to a method of manufacturing a silicon carbide wafer comprising forming a semiconductor substrate comprising SiC at a surface or at least specific parts of the surface thereof; cleaning a surface area of the substrate by a hydrogen plasma atmosphere; applying nickel metal contact material on the cleaned surface area to form SiC/Ni metal stacks at the surface of or at least parts of the SiC substrate; and annealing the SiC/Ni metal stacks to form Ohmic contacts at the interface between the SiC and the nickel metal.

A method of forming a contact structure for a silicon carbide semiconductor device, the method comprises the following steps in the following order: forming a gate structure for a transistor comprising a source region in a semiconductor layer; forming a silicide layer on the source region, wherein the silicide layer is self-aligned with the gate structure; providing a dielectric layer over the silicide layer; patterning the dielectric layer to form an opening to the silicide layer; and providing a metal in the opening to form an electric contact to the source region.

Disclosed are an MPS diode device and a preparation method therefor. The MPS diode device comprises a plurality of cells arranged in parallel, wherein each cell comprises a cathode electrode, and a substrate, epitaxial layer, buffer layer, and anode electrode that are formed in succession on the cathode electrode; two active regions are formed on the side of the epitaxial layer away from the substrate; the width of forbidden band of the buffer layer is greater than the width of forbidden band of the epitaxial layer, and a material of the buffer layer and a material of the epitaxial layer are allotropes; and first openings are formed at the positions in the buffer layer opposite to the active regions, and an ohmic metal layer is formed in the first openings.

Provided is a manufacturing method of a semiconductor device including a semiconductor substrate, including: forming an interlayer dielectric film above the semiconductor substrate; forming contact holes exposed from a part of an upper surface of the semiconductor substrate on the interlayer dielectric film; and forming an metal electrode including an element of aluminum by DC sputtering above the interlayer dielectric film and inside the contact holes, wherein in at least a part of a process of forming the metal electrode in forming the electrode, a heating temperature that is a temperature for heating the semiconductor substrate is 400 C. or higher, and a DC sputtering power is 5 kW or lower.

A method of manufacturing a semiconductor device includes forming a trench that extends from a first surface into a silicon carbide body. A first doped region and an oppositely doped second doped region are formed in the silicon carbide body. A lower layer structure is formed on a lower sidewall portion of the trench. An upper layer stack is formed on an upper sidewall portion and/or on the first surface. The first doped region and the upper layer stack are in direct contact along the upper sidewall portion and/or on the first surface. The second doped region and the lower layer structure are in direct contact along the lower sidewall portion.