According to one embodiment, a semiconductor manufacturing device includes a processing chamber that accommodates a substrate, a support that supports the substrate, a nozzle that supplies a resist material onto the substrate, a first temperature regulator, and a second temperature regulator. The first temperature regulator is attached to the support and the second temperature regulator is attached to the processing chamber, At least one of the first temperature regulator or the second temperature regulator forms a resist film from the resist material by regulating a temperature of the resist material.

According to one embodiment, a semiconductor manufacturing device includes a processing chamber that accommodates a substrate, a support that supports the substrate, a nozzle that supplies a resist material onto the substrate, a first temperature regulator, and a second temperature regulator. The first temperature regulator is attached to the support and the second temperature regulator is attached to the processing chamber, At least one of the first temperature regulator or the second temperature regulator forms a resist film from the resist material by regulating a temperature of the resist material.

An imprint device includes a template having a pattern to be transferred to a resin material disposed on a processing substrate or a dummy substrate, and a control unit that performs first imprint processing in which the template is pressed against an uncured first resin material disposed on one shot region of the processing substrate to transfer the pattern to the first resin material, and second imprint processing in which the template is pressed against an uncured second resin material disposed on the dummy substrate. The control unit performs the second imprint processing after the first imprint processing performed on a first shot region and before the first imprint processing performed on a second shot region, wherein the first imprint processing is to be performed on the first shot region and the second shot region in successive order.

The present application relates to a semiconductor fin structure cut process. The process includes: providing a semiconductor substrate and forming a plurality of fin structures on the semiconductor substrate, a gap being formed between every two adjacent fin structures; depositing a first dielectric layer, the first dielectric layer being filled in the gaps so that all fin structures are connected into a whole to form a semiconductor with fins; forming a plurality of pattern layer strips on the semiconductor with fins, a groove being formed between every two adjacent pattern layer strips, the fin structures closest to each pattern layer strip in the semiconductor with fins being necessary fin structures, attaching mask strips onto side surfaces of each pattern layer strip, the mask strips covering the necessary fin structures; etching the semiconductor with fins so that the unnecessary fin structures not covered by the mask strips are truncated.

A resist composition which generates an acid upon exposure and whose solubility with respect to a liquid developer changes by an action of the acid, the resist composition including a base material component whose solubility with respect to a liquid developer changes by an action of the acid, an acid generating agent component which generates an acid upon exposure, a first acid diffusion control component; and a second acid diffusion control component, in which the first acid diffusion control component (D1) includes a compound (d1-1), and the second acid diffusion control component (D2) includes a compound (d2-1).

Provided are a polymer including a first repeating unit represented by Formula 1 and a second repeating unit represented by Formula 2, a method of producing the same, a resist composition including the polymer, and a method of producing a pattern by using the resist composition:

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wherein, for descriptions of L.sub.11, a11, X.sub.11, c11, Y.sub.21, Y.sub.22, n21, L.sub.21, L.sub.22, a21, a22, R.sub.21, R.sub.22, X.sub.21, X.sub.22, c21, c22 and o21 in Formulae 1 and 2, reference should be made to the specification.

A method for manufacturing a semiconductor substrate includes applying a composition for film formation to a substrate. The composition includes: a metal compound; an aromatic compound including an aromatic hydrocarbon ring structure and a partial structure represented by formula (1); and a solvent. The aromatic hydrocarbon ring structure has 6 or more carbon atoms. X is a group represented by formula (i) (ii), (iii) or (iv). R.sup.1 is a hydrogen atom or a monovalent organic group having 1 to 20 carbon atoms, and R.sup.2 is a monovalent organic group having 1 to 20 carbon atoms. R.sup.3 is a hydrogen atom or a monovalent organic group having 1 to 20 carbon atoms, and R.sup.4 is a monovalent organic group having 1 to 20 carbon atoms. R.sup.5 is a monovalent organic group having 1 to 20 carbon atoms. R.sup.6 is a monovalent organic group having 1 to 20 carbon atoms.

##STR00001##

A method for manufacturing a semiconductor substrate includes applying a composition for film formation to a substrate. The composition includes: a metal compound; an aromatic compound including an aromatic hydrocarbon ring structure and a partial structure represented by formula (1); and a solvent. The aromatic hydrocarbon ring structure has 6 or more carbon atoms. X is a group represented by formula (i) (ii), (iii) or (iv). R.sup.1 is a hydrogen atom or a monovalent organic group having 1 to 20 carbon atoms, and R.sup.2 is a monovalent organic group having 1 to 20 carbon atoms. R.sup.3 is a hydrogen atom or a monovalent organic group having 1 to 20 carbon atoms, and R.sup.4 is a monovalent organic group having 1 to 20 carbon atoms. R.sup.5 is a monovalent organic group having 1 to 20 carbon atoms. R.sup.6 is a monovalent organic group having 1 to 20 carbon atoms.

##STR00001##

An element includes a substrate and a surface layer on the substrate. The surface layer includes at least one first region comprising an optically transparent and electrically insulative first material and at least one second region at least partially embedded in the at least one first region. The at least one second region comprises an optically transparent and electrically conductive second material.

Embodiments of improved process flows and methods are provided to pattern a semiconductor substrate using direct self-assembly (DSA) of metalate salt ionic liquid crystals (ILCs) having metalate anions. After self-assembly of the metalate salt ILCs into ordered structures, an oxidation process is used to remove the organic components of the ordered structures and convert the metalate anions into metal oxide patterns. In addition to providing a robust metal oxide pattern, which can be transferred to the underlying substrate, the process flows and methods disclosed herein enable ILCs to be used as pitch multipliers in advanced patterning techniques.