Patent classifications
H10P95/904
Technique for GaN Epitaxy on Insulating Substrates
A semiconductor device includes a substrate, a dielectric layer on the substrate, a first epitaxial layer on the dielectric layer, and a second epitaxial layer on the first epitaxial layer.
Schottky diode and manufacturing method thereof
Disclosed are a Schottky diode and a manufacturing method thereof. The Schottky diode includes a substrate, a first semiconductor layer, a heterostructure layer, a passivation layer, and a cap layer stacked in sequence. The passivation layer includes a first groove and a second groove, and the first groove and the second groove penetrate through at least the passivation layer. A first electrode is arranged at least on the cap layer corresponding to the first groove; a second electrode is arranged in the second groove. A Schottky contact is formed between the first electrode and the cap layers, so that a direct contact area between the first electrode and the heterostructure layer may be avoided, a contradiction between the forward turn-on voltage and the reverse leakage of the Schottky diode may be balanced, and a leakage characteristic of the heterostructure layer in a high temperature environment may be suppressed.
DIFFUSION SUPPRESSION IN HIGH-TEMPERATURE ANNEALING OF NITRIDES
A nitride semiconductor and method of making the same are provided. In embodiments, a method for manufacturing a nitride semiconductor includes: providing a nitride semiconductor material including at least one main dopant defining a p-type portion; doping the nitride semiconductor material with at least one co-dopant co-located with the main dopant, wherein the co-dopant reduces gas-enhanced diffusion of the main dopant by a component in an ambient gas during annealing; and annealing the nitride semiconductor material under pressure, thereby producing an annealed nitride semiconductor material with an activated main dopant. In implementations, a nitride semiconductor is produced including an annealed nitride semiconductor material doped with magnesium (Mg) and oxygen (O) in an activated p-type portion, wherein the Mg and O are present at a ratio of 2:1.
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes: injecting an inert element or an electron beam into a GaN-based semiconductor substrate; implanting magnesium into the GaN-based semiconductor substrate; and performing a heat treatment after the injecting and the implanting. A first implantation range of inert element or electron beam and a second implantation range of magnesium overlap with each other. A reference depth Dref (nm) calculated using a formula of Dref=D1+140 and a deepest injection depth D1 (nm) in the injecting is deeper than a deepest implantation depth D2 (nm) in the implanting. After the heat treatment, a concentration of magnesium decreases toward a deeper side at a predetermined decrease rate at a position of the reference depth Dref. The predetermined decrease rate is smaller than a decrease rate at which a concentration of magnesium becomes 1/10 per depth of 300 nm.