A power semiconductor module includes a power semiconductor element having a first electrode, a second electrode, and a control electrode. The power semiconductor element is configured to selectively control a conductivity state between the first electrode and the second electrode. The power semiconductor module further includes a first power line electrically connected to the first electrode, a second power line electrically connected to the second electrode, a first control line electrically connected to the control electrode, a second control line electrically connected to the second electrode, and a heat sink having a front surface on which the power semiconductor element is formed. The heat sink includes a shielding layer. The first control line and the second control line extend through the heat sink.

A semiconductor device includes an insulated circuit board having a lower surface, a heat dissipation base plate having a front surface that includes an arrangement region in which the lower surface of the insulated circuit board is arranged via solder and a solder region in which the solder spreads over the arrangement region, a plating film formed on the front surface of the heat dissipation base plate except for the solder region, and an alloy layer disposed between the solder and the heat dissipation base plate in the arrangement region. The alloy layer contains a solder component that is contained in the solder. In particular, in the semiconductor device, the plating film is formed on an entire surface of the heat dissipation base plate except for an opening region surrounding an outer periphery of the arrangement region where the insulated circuit board is arranged via the solder.

A semiconductor apparatus includes a substrate, a semiconductor device arranged on an upper surface of the substrate, a lead frame bonded to an upper surface of the semiconductor device via a bonding material, the lead frame having a first recess on an upper surface thereof, a wire connected to the first recess, and a resin that seals the substrate, the semiconductor device, the lead frame, and the wire.

A semiconductor apparatus includes a substrate, a semiconductor device arranged on an upper surface of the substrate, a lead frame bonded to an upper surface of the semiconductor device via a bonding material, the lead frame having a first recess on an upper surface thereof, a wire connected to the first recess, and a resin that seals the substrate, the semiconductor device, the lead frame, and the wire.

A semiconductor device, including: a semiconductor substrate having a main surface; an interlayer insulating film provided on the main surface of the semiconductor substrate; a contact hole penetrating through the interlayer insulating film to reach the semiconductor substrate; a plug electrode embedded in the contact hole; a first barrier metal provided on the interlayer insulating film, the first barrier metal being apart from the plug electrode; and a front electrode provided on the first barrier metal and the plug electrode.

A first gate pattern and a first source pattern are linearly formed in parallel to each other along a first edge of an insulating substrate. A second gate pattern is formed in a quadrangular shape in a top view, extending from the first edge side of the insulating substrate to a second edge side facing the first side. A drain pattern is formed to surround at least three edges of the quadrangular shape of the second gate pattern. A second source pattern is formed along an edge other than the first edge of the insulating substrate to surround the drain pattern. First and second semiconductor chip groups are arranged at positions adjacent to the second source pattern. The first and second semiconductor chip groups and the second source pattern are connected via a plurality of first source wires.