Patent classifications
H10W40/235
Cooling package structure applied to integrated circuit
A cooling package for an integrated circuit, including: package substrate of the integrated circuit having a first package surface, an enclosure and a thermal conductive material filling a gap between the substrate and a circuit die locatable therein and filling a gap between interior sidewalls of the enclosure and sidewall surfaces of the circuit die couplable to the first package surface. A method including: mounting an enclosure to the first package surface, the enclosure surrounding a location on the first package surface the circuit die is couplable thereto and the circuit die is locatable therein, and, filling the enclosure with the thermal conductive material such that the gaps are filled with the thermal conductive material. An integrated circuit cooling package including the substrate, first and second enclosures and first and second thermal conductive materials is also disclosed.
Systems and methods for active and passive cooling of electrical components
A method for mounting a fin system in a power module includes: sintering a fin system to a first base substrate, the fin system comprising a plurality of fins attached to and extending away from a base plate; sintering a first power switch component to the first base substrate; sintering a second power switch component to a second base substrate; and soldering a heat dissipation element to the second base substrate.
POWER SEMICONDUCTOR DEVICE
A power semiconductor device includes a case including an air passage; a heat sink held by the case, with a plurality of fins disposed in the air passage; and a plurality of power modules. An uneven surface is formed on an opposite face of a heat sink base. The power modules each include an uneven part engaging with the uneven surface of the heat sink base and are spaced along a direction of an air flow, with the uneven parts fitted into the uneven surface of the heat sink base. One of an adjacent pair of the power modules in the direction of the air flow is disposed to offset in a direction orthogonal to the direction of the air flow relative to an other of the adjacent pair of the power modules.
SYSTEMS AND METHODS FOR LOW INDUCTANCE PHASE SWITCH FOR INVERTER FOR ELECTRIC VEHICLE
A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a power module including: a first phase switch including one or more first phase power switches on a first side of a substrate; and a second phase switch including one or more second phase power switches on a second side of the substrate opposite to the first side.
Package, Chip, and Electronic Apparatus
A package includes a substrate, and a first die, a second die, a first structural member, and a second structural member that are disposed on the substrate. A first dielectric material is disposed between the first die and the second die. The first structural member is disposed on a side that is of the first die and that is away from the substrate, and the first die is located in a region of orthographic projection of the first structural member on a surface of the substrate. The second structural member is disposed on a side that is of the second die and that is away from the substrate, the second die is located in a region of orthographic projection of the second structural member on the surface of the substrate, and there is a gap between the first structural member and the second structural member.
CAMM MODULE RETENTION FOR COMPRESSIVE MOUNT CONNECTOR AND HEATSINK
An apparatus, comprising an interposer; a memory module, comprising a plurality of memory chips, and mounted to the interposer; and a heatsink, fastened to the interposer and configured to compress the interposer against the memory module.
TSV Interposer, Method for Manufacturing Therefor and Three-dimensional Chip
The disclosure provides a through-silicon via (TSV) interposer, a method for manufacturing therefor and a three-dimensional chip. The TSV interposer includes: a substrate, and an interior of the substrate is provided with a cavity and a first structural layer covering a part of an inner wall of the cavity, and a material type of the first structural layer is different from a material type of the substrate; a via hole structure that penetrates the substrate and is located at a side of the cavity; and liquid metal located in the cavity, and the liquid metal and the first structural layer include a same material element.
SEMICONDUCTOR DEVICE
A semiconductor device, including: a first circuit board, which includes: a first insulating plate, a first conductive plate embedded in the first insulating plate, the first conductive plate including a first front surface and a first back surface that are exposed from the first insulating plate, and a second conductive plate embedded in the first insulating plate, the second conductive plate including a second front surface and a second back surface that are exposed from the first insulating plate, the second conductive plate being separated from the first conductive plate; a second circuit board including a second insulating plate on which a conductive pattern layer is laid; and a semiconductor chip group including a first semiconductor chip and a second semiconductor chip, the semiconductor chip group being sandwiched between the first circuit board and the second circuit board.
Systems and methods for three channel galvanic isolator for inverter for electric vehicle
A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: an upper phase multi-chip module including: a low-voltage upper phase controller; a high-voltage upper phase A controller; an upper phase A galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase A controller; a high-voltage upper phase B controller; an upper phase B galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase B controller; a high-voltage upper phase C controller; and an upper phase C galvanic isolator connecting the low-voltage upper phase controller to the high-voltage upper phase C controller.
Cooling cover and packaged semiconductor device including the same
Cooling covers including trapezoidal cooling chambers for cooling packaged semiconductor devices and methods of forming the same are disclosed. In an embodiment, a cooling cover for a semiconductor device includes an inlet; an outlet; and a cooling chamber in fluid communication with the inlet and the outlet, the cooling chamber having a trapezoidal shape in a cross-sectional view.