Patent classifications
H10W70/435
SEMICONDUCTOR DEVICE WITH A DIELECTRIC SPACER AND METHOD OF MANUFACTURING
A semiconductor device includes a package body having a topside in a first plane and a bottom side in a second plane parallel to the first plane. At least one lead protruding out of the package body has a first portion in a plane parallel to the first plane and a second portion being bent away from the first plane towards the second plane. A cavity is positioned between the at least one lead and a feature of the semiconductor device. A removable dielectric spacer is configured to be positioned in the cavity between the at least one lead and the feature. The dielectric spacer is longer than the at least one lead.
Semiconductor device and method of manufacturing the same
Reliability of a semiconductor device is improved. The semiconductor device includes a clip which is electrically connected to a main-transistor source pad via a first silver paste and is connected to a lead via a second silver paste. The clip has a first part with which the first silver paste is in contact, a second part with which the second silver paste is in contact, and a third part positioned between the first part and the second part. A protruding member is formed on a surface of the main-transistor source pad, and the first part is in contact with the protruding member.
METHOD OF PRODUCING SUBSTRATES FOR SEMICONDUCTOR DEVICES, CORRESPONDING SUBSTRATE AND SEMICONDUCTOR DEVICE
A pre-molded leadframe includes a laminar structure having empty spaces therein and a first thickness with a die pad having opposed first and second die pad surfaces. Insulating pre-mold material is molded onto the laminar structure. The pre-mold material penetrates the empty spaces and provides a laminar pre-molded substrate having the first thickness with the first die pad surface left exposed. The die pad has a second thickness that is less than the first thickness. One or more pillar formations are provided protruding from the second die pad surface to a height equal to a difference between the first and second thicknesses. With the laminar structure clamped between surfaces of a mold, the first die pad surface and pillar formations abut against the mold surfaces. The die pad is thus effectively clamped between the clamping surfaces countering undesired flashing of the pre-mold material over the first die pad surface.
Molded module package with an EMI shielding barrier
An electronic device that includes a substrate and a die disposed on the substrate, the die having an active surface. Wire bonds are attached from the active surface of the die to the substrate. A radiation barrier is attached to the substrate and disposed over the die. The radiation barrier is configured to mitigate electromagnetic radiation exposure to the die. A mold compound is formed over the die, the wire bonds, and the radiation barrier.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic device comprises a substrate comprising a first side and a second side opposite the first side, wherein the substrate comprises a first groove at the second side of the substrate, a first electronic component over the first side of the substrate, and a resin in the first groove. The substrate comprises a floating pad at the first side of the substrate, a second groove at the first side of the substrate, and a third groove at the first side of the substrate, wherein the floating pad is between the second groove and the third groove. Other examples and related methods are also disclosed herein.
MICROELECTRONICS DEVICE PACKAGE WITH ISOLATION AND CERAMIC INTERPOSER FORMING THERMAL PAD
A microelectronic device package includes: a package substrate having a first set of leads spaced from a first die pad configured for mounting semiconductor devices, and a second set of leads spaced from a second die pad configured for mounting additional semiconductor devices, the first die pad and the first set of leads spaced from the second die pad and the second set of leads. Semiconductor devices are mounted to the first die pad and second die pad. A ceramic interposer is mounted to the package substrate in thermal contact with at least the first die pad. Mold compound covers the semiconductor devices, a portion of the ceramic interposer, and portions of the first set and the second set of leads.
LEAD FRAME, PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
A lead frame includes a base island; a plurality of leads located around the base island, the adjacent leads having between them a gap, each of the leads comprising an inner lead close to the base island and an outer lead far away from the base island, the inner lead and the outer lead being connected by a connection part; a UV tape covering at least one of a back surface or a front surface of the connection part of each of the leads and filling the gaps between the connection parts of the adjacent leads, the UV tape being configured to prevent molding layer material from overflowing in the direction of the outer leads through the gaps between the adjacent leads during subsequent formation of a molding layer covering the base island and the inner leads, and the UV tape being peeled off after irradiation by a UV light after forming the molding layer.
Integration of glass core into electronic substrates for fine pitch die tiling
Embodiments disclosed herein include a package substrate. In an embodiment, the package substrate comprises a core with a first surface and a second surface, where the core comprises glass. In an embodiment, a first via is through the core, where the first via comprise a conductive material, and a film over the first surface of the core, where the film is an adhesive. In an embodiment, a second via is through the film, where the second via comprises a conductive material, where the second via contacts the first via. In an embodiment, a centerline of the second via is aligned with a centerline of the first via. In an embodiment, a buildup layer is over the film.
SEMICONDUCTOR PACKAGES INCLUDING A PACKAGE BODY WITH GROOVES FORMED THEREIN
A semiconductor package and method are disclosed. In one example, the semiconductor package includes a package body. A first diepad is at least partially uncovered by the package body at the first main surface. A second diepad is at least partially uncovered by the package body at the first main surface. A first semiconductor chip is arranged on the first diepad. A second semiconductor chip is arranged on the second diepad. The semiconductor package further includes at least one lead protruding out of the package body at the side surface. A first groove and a second groove are formed in the first main surface. The method includes a method of making the semiconductor package.