Patent classifications
H10P50/28
Methods for wet atomic layer etching of silicon dioxide
The present disclosure provides a new wet atomic layer etch (ALE) process for etching silicon dioxide (SiO.sub.2) materials. More specifically, the present disclosure provides various embodiments of methods that utilize new etch chemistries for etching a SiO.sub.2 layer in a cyclic wet ALE process. The new etch chemistries disclosed herein use an anhydrous basic surface modification solution to create self-limiting reactions on exposed surfaces of the SiO.sub.2 layer and form a silicate passivation layer, which is insoluble in the surface modification solution, but readily soluble in a dissolution solution.
Method for etching silicon-containing film and semiconductor device manufacturing method comprising same
There is provided a method for etching a silicon-containing film. The method includes: introducing a substrate having a first silicon-containing film and a second silicon-containing film into a process chamber of an etching apparatus; supplying at least one etching gas including F.sub.3NO into the process chamber; applying a predetermined power to the process chamber maintained at a predetermined pressure to generate direct plasma in the process chamber; and etching the first silicon-containing film on the substrate by reactive species (radicals) of the etching gas activated by the direct plasma. The predetermined pressure is set within a predetermined range in which the slope of the etch rate of the first silicon-containing film with respect to the pressure differs from the slope of the etch rate of the second silicon-containing film with respect to the pressure in terms of sign.
Substrate processing method and substrate processing apparatus
A technique enabling wet etching of a first silicon oxide film with high selectivity with respect to a metal film and a second silicon oxide film is provided. A substrate processing method of wet-etching a substrate having a stacked structure including a metal film, a first silicon oxide film, and a second silicon oxide film having a moisture content lower than that of the first silicon oxide film is provided. The substrate processing method includes performing an etching while increasing etching selectivity of the first silicon oxide film with respect to the second silicon oxide film and the metal film by supplying an etching liquid, which is prepared by diluting sulfuric acid, hydrogen peroxide and hydrofluoric acid in an anhydrous organic solvent, to the substrate such that the metal film, the first silicon oxide film, and the second silicon oxide film are simultaneously exposed to the etching liquid.
Selective self-assembled monolayer (SAM) removal
Methods of forming microelectronic devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include forming a hardmask on the dielectric layer; selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap and on the hardmask; treating the microelectronic device with a plasma to remove the self-assembled monolayer (SAM) from the hardmask; forming a barrier layer on the dielectric layer and on the hardmask; selectively depositing a metal liner on the barrier layer on the sidewall; and performing a gap fill process on the metal liner.
Selective in-situ carbon-based mask protection
A method of etching an underlying layer includes performing a pretreatment step, a reaction step, and an etch step. The pretreatment step includes exposing surfaces of a patterned carbon-containing layer to oxygen to form CO bonds at the surfaces with or without using plasma. The reaction step includes exposing the CO bonds to an oxygen-reactive precursor to selectively form a mask protection layer on the surfaces of the patterned carbon-containing layer. The etch step is performed after the pretreatment step, and includes flowing an etchant gas and exciting plasma from the etchant gas to etch the underlying layer using the patterned carbon-containing layer as an etch mask. Any of the pretreatment step, the reaction step, and the etch step may be performed consecutively, concurrently, or repeated as a cycle.
Thermal pad for etch rate uniformity
Etch uniformity is improved by providing a thermal pad between an insert ring and electrostatic chuck in an etching chamber. The thermal pad provides a continuous passive heat path to dissipate heat from the insert ring and wafer edge to the electrostatic chuck. The thermal pad helps to keep the temperature of the various components in contact with or near the wafer at a more consistent temperature. Because temperature may affect etch rate, such as with etching hard masks over dummy gate formations, a more consistent etch rate is attained. The thermal pad also provides for etch rate uniformity across the whole wafer and not just at the edge. The thermal pad may be used in an etch process to perform gate replacement by removing hard mask layer(s) over a dummy gate electrode.
Methods of selectively etching silicon nitride
Embodiments of the present disclosure are directed to selective etching processes. The processes include flowing a precursor comprising one or more of an interhalogen, a halogen-containing species, a pseudohalogen species, a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and an amine or a phosphine, or a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species with a sulfur-containing species, into a semiconductor processing chamber containing a substrate, and forming an activated species of the precursor to etch a substrate. The substrate has a plurality of alternating layers of silicon oxide and silicon nitride thereon and a trench formed through the plurality of alternating layers. The silicon nitride layers are selectively etched relative to the silicon oxide layers at an etch selectivity of greater than or equal to 500:1.
SEMICONDUCTOR DEVICE HAVING AN ETCHING STOPPER LAYER ON A FIRST INSULATION LAYER
According to one embodiment, a semiconductor device includes a semiconductor layer including a source area, a drain area and a channel area, a first insulating layer, an etching stopper layer located immediately above the channel area and being thinner than the first insulating layer, a second insulating layer provided on the etching stopper layer and being thicker than the first insulating layer, a gate electrode, a third insulating layer which covers the etching stopper layer, the second insulating layer and the gate electrode and covers the first insulating layer immediately above the source area and immediately above the drain area, a source electrode in contact with the source area, and a drain electrode in contact with the drain area.
OXIDE FILM ETCHING METHOD AND SUBSTRATE PROCESSING APPARATUS
An oxide film etching method includes: forming a protective film of a metal or a metal nitride that does not contain silicon so as to cover a protection target film, among the protection target film containing silicon and a silicon-containing oxide film exposed on a surface of a substrate; supplying, to the substrate, a mixed gas including a hydrogen fluoride gas and an ammonia gas to react with the silicon-containing oxide film, and modifying the oxide film to generate a reaction product; and sublimating and removing the reaction product.
Etching method and method for producing semiconductor element
Provided is an etching method capable of selectively etching an etching object containing silicon nitride as compared with a non-etching object while the generation of particles and a variation in etching rate are suppressed. The etching method includes an etching step of bringing an etching gas containing more than 20% by volume of nitrosyl fluoride into contact with a member to be etched (12) having an etching object that is to be etched by the etching gas and having a non-etching object that is not to be etched by the etching gas, to selectively etch the etching object as compared with the non-etching object without plasma. The etching object contains silicon nitride.