H10P50/644

Use of a composition and a process for selectively etching silicon

Described herein is a method of using a composition for selectively etching a silicon layer in the presence of a layer including a silicon germanium alloy, the composition including: (a) 4 to 15% by weight of an amine of formula (E1), and (b) water, where X.sup.E1, X.sup.E2, and X.sup.E3 are independently selected from a chemical bond and C.sub.1-C.sub.6 alkanediyl; Y.sup.E is selected from N, CR.sup.E1, and P; R.sup.E1 is selected from H and C.sub.1-C.sub.6 alkyl.

Method of forming semiconductor device using wet etching chemistry

A wet etching chemistry to selectively remove a polymer residue on an opening embedded in a low-k dielectric layer and an underlying stop layer in a process of forming an interconnect structure is provided. The wet etching chemistry includes: two type of organic solvents, wherein a concentration of the two type of organic solvents is greater than or equal to 70%; an Alkali source amine, at least comprising a tertiary amine; an inhibitor; and water. In some embodiment, the wet etching chemistry is free of a peroxide to avoid damage to the WdC hard mask.

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOF

A method of forming a semiconductor device includes a number of operations. A dielectric layer is formed over a plurality of nanostructures arranged in a vertical manner and an isolation structure adjacent the nanostructures. The dielectric layer is nitridated. A vertical portion of the nitridated dielectric layer over a sidewall of the nanostructure is removed, wherein a first horizontal portion of the nitridated dielectric layer remains over the isolation structure, and a second horizontal portion of the nitridated dielectric layer remains over a topmost one of the nanostructures. A source/drain region is formed through the second horizontal portion of the nitridated dielectric layer and the nanostructures. A gate structure is formed and wraps around the nanostructures.

SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME

Embodiments of the present disclosure provide methods for forming semiconductor device structures. The method includes forming a fin structure from a substrate, and the fin structure includes alternating first and second semiconductor layers. The method further includes removing edge portions of each of the second semiconductor layers, depositing an insulating material around the fin structure, performing a thermal process to expand the second semiconductor layers laterally, forming a sacrificial gate structure over a portion of the fin structure, recessing an exposed portion of the fin structure, and forming a source/drain region over the recessed portion of the fin structure.

Substrate processing method and substrate processing apparatus
12545839 · 2026-02-10 · ·

According to the present invention, a substrate W is provided with a recess 95. The width of the recess 95 is smaller than the depth of the recess 95. An etching target which is at least one of a single crystal of silicon, a polysilicon and an amorphous silicon is exposed in at least a part of the upper part of a lateral surface 95s and in at least a part of the lower part of the lateral surface 95s. The etching target is etched by supplying an alkaline first etching liquid, in which an inert gas is dissolved, to the substrate W. The etching target is etched by supplying an alkaline second etching liquid, in which a dissolution gas is dissolved, and which has a dissolved oxygen concentration higher than that of the first etching liquid, to the substrate W before or after the first etching liquid is supplied to the substrate W.

Wet etching process for manufacturing semiconductor structure

A method for manufacturing a semiconductor structure includes forming a plurality of semiconductor stack portions spaced apart from each other by a plurality of recesses, each of which includes two sacrificial layer portions and a channel layer portion disposed therebetween, in which the channel layer portion has a plurality of crystal planes and is formed with a first straight lateral surface which is aligned with one of the crystal planes that has a lowest etching rate for an etchant to be used for laterally etching the channel layer portion among those of the crystal planes of the channel layer portion which are able to expose to the recesses; and laterally etching the channel layer portion using the etchant to permit the channel layer portion to be formed with a second straight lateral surface.

Substrate processing method and substrate processing apparatus

An etching method includes a first etching step, a processing step, and a second etching step. The first etching step is performed to etch a substrate on which a silicon oxide film and a silicon nitride film are formed with an etching liquid. The processing step is performed to process a pattern in the silicon oxide film on the substrate with a pattern shape processing liquid after the first etching step. The second etching step is performed to etch the substrate with the etching liquid after the processing step.