A device includes a first conductive-member which connects to a first electrode on a first face of a chip. A second conductive-member is spaced from the chip and the first conductive-member. A third conductive-member is spaced from the first and second conductive-members. A first connector connects between the second electrode and the second conductive-member. A second connector is opposed to a third electrode on the second face and connects the third electrode and the third conductive-member. A first connecting-member connects the first connector and the second face. A second connecting-member connects the first connector and the second conductive-member. The first connector includes first protruded portions protruded in a first direction from the first conductive-member to the second conductive-member. The second connecting-member is provided to correspond to each of places between the first protruded portions and the second conductive-member.

A semiconductor package includes a lead frame, a low side field-effect transistor (FET), a high side FET, a metal clip, and a molding encapsulation. The low side FET is flipped and is attached to a first die paddle of the lead frame. The lead frame comprises one or more voltage input (Vin) leads; a gate lead; one or more switching node (Lx) leads; a first die paddle; a second die paddle; and an end paddle. Each of an exposed bottom surface of the one or more Lx leads is directly connected to an exposed bottom surface of the end paddle. A longitudinal direction of an exposed bottom surface of the gate lead is perpendicular to a longitudinal direction of each of the exposed bottom surface of the one or more Lx leads. An entirely of each of the one or more Vin leads is of the full thickness.

A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.

An electronic device has a molded package (e.g., a quad flat no leads package) with attached connectors. The molded package includes one or more semiconductor dies and is pretested prior to attachment of the connectors. Along these lines, such molded packages may be pretested in parallel at high volume due to their relatively small form factor (e.g., at numbers several times greater than those for testing leaded socket assemblies). Following such pretesting, the connectors are attached to the pretested molded package (e.g., by directly fusing the connectors to metallic pads on surfaces of the packaged integrated circuit via laser welding or soldering). Such electronic devices may be further tested if desired (e.g., opens/shorts tested) and encased within housings to form larger modules (e.g., accelerometers, pressure sensors, etc.).

A semiconductor package includes a transistor chip having first and second opposite facing sides. The semiconductor transistor chip includes a first load electrode and a second load electrode on the first side. The package includes a carrier facing the second side of the chip, a first terminal post laterally beside the transistor chip and a second terminal post laterally beside the transistor chip. The second terminal post is a part of the carrier or physically connects to the carrier. A first clip connects the first load electrode to the first terminal post. A second clip connects the second load electrode to the second terminal post. An upper surface of the first terminal post and an upper surface of the second terminal post are arranged at different levels of height. The first clip and the second clip are of same shape.

A semiconductor device includes a chip carrier, a first power chip arranged above a mounting surface of the chip carrier, a laminate arranged above a top surface of the first power chip facing away from the chip carrier, and a first logic chip configured to drive the first power chip and arranged above a top surface of the laminate facing away from the chip carrier. The first power chip and the first logic chip are electrically coupled via an electrical wiring of the laminate.