A power module includes a first end power semiconductor element and a second end power semiconductor element. A first sum is a sum of a path length between the gate electrode of the first end power semiconductor element and a first control terminal and a path length between the source electrode of the first end power semiconductor element and a first detection terminal. A second sum is a sum of a path length between the gate electrode of the second end power semiconductor element and the first control terminal and a path length between the source electrode of the second end power semiconductor element and the first detection terminal. The power module includes a first control layer connected to the gate electrode. The first control layer includes a first detour portion that detours the path to reduce a difference between the first sum and the second sum.

Workability in a manufacturing process of a semiconductor device is improved. A terminal member is the terminal member joined to an electrode of a semiconductor element, and includes a conductor portion, a first annular projecting portion, and an annular recess. The conductor portion has a first main surface and a second main surface located on a side opposite to the first main surface. The first annular projecting portion is provided on the first main surface of the conductor portion. The annular recess is provided on the second main surface and is disposed at a position overlapping with the first annular projecting portion. By pressing a joining member against the first main surface of the terminal member, the first annular projecting portion can be embedded in the joining member.

A semiconductor module includes a laminate substrate including an insulating plate and first and second circuit boards on an upper surface of the insulating plate, the first semiconductor device on an upper surface of the first circuit board, a first main terminal, and a first metal wiring board that electrically connects the first semiconductor device to the first main terminal. The first metal wiring board has a first bonding section bonded to an upper surface electrode of the first semiconductor device, a second bonding section bonded to an upper surface of the second circuit board, a first coupling section that couples the first bonding section to the second bonding section, a first raised section that rises upward from an end portion of the second bonding section. The first raised section has an upper end that is electrically connected to the first main terminal.

A copper paste for joining contains metal particles and a dispersion medium, in which the copper paste for joining contains copper particles as the metal particles, and the copper paste for joining contains dihydroterpineol as the dispersion medium. A method for manufacturing a joined body is a method for manufacturing a joined body which includes a first member, a second member, and a joining portion that joins the first member and the second member, the method including: a first step of printing the above-described copper paste for joining to at least one joining surface of the first member and the second member to prepare a laminate having a laminate structure in which the first member, the copper paste for joining, and the second member are laminated in this order; and a second step of sintering the copper paste for joining of the laminate.

A device includes a first conductive-member which connects to a first electrode on a first face of a chip. A second conductive-member is spaced from the chip and the first conductive-member. A third conductive-member is spaced from the first and second conductive-members. A first connector connects between the second electrode and the second conductive-member. A second connector is opposed to a third electrode on the second face and connects the third electrode and the third conductive-member. A first connecting-member connects the first connector and the second face. A second connecting-member connects the first connector and the second conductive-member. The first connector includes first protruded portions protruded in a first direction from the first conductive-member to the second conductive-member. The second connecting-member is provided to correspond to each of places between the first protruded portions and the second conductive-member.

In a general aspect, a half-bridge circuit includes a substrate having first, second and third patterned metal layers disposed on a surface. The circuit also includes first and second high-side transistors disposed on the first patterned metal layer, and first and conductive clips electrically coupling, respectively, the first and second high-side transistors with the second patterned metal layer. The circuit also includes first and second low-side transistors disposed on the second patterned metal layer, and third and fourth conductive clips electrically coupling, respectively, the first and second low-side transistors with the third patterned metal layer. The circuit further includes a DC+ terminal electrically coupled with the first patterned metal layer via a first conductive post disposed between the first and second high-side transistors, and a DC terminal electrically coupled with the third patterned metal layer via a second conductive post disposed between the third and fourth conductive clips.

In a general aspect, a power module includes a substrate having first, second and third patterned metal layers disposed on a surface of the substrate. The module also includes a first high-side transistor disposed on the first patterned metal layer, a second high-side transistor disposed on the first patterned metal layer, a first conductive clip electrically coupling the first high-side transistor with the second patterned metal layer, and a second conductive clip electrically coupling the second high-side transistor with the second patterned metal layer. The module further includes a first low-side transistor disposed on the second patterned metal layer, a second low-side transistor disposed on the second patterned metal layer, a third conductive clip electrically coupling the first low-side transistor with the third patterned metal layer, and a fourth conductive clip electrically coupling the second low-side transistor with the third patterned metal layer.

A transistor device includes: a plurality of transistor cells in a semiconductor substrate; and a source pad above the semiconductor substrate and electrically connected to a source region and a body region of the transistor cells. A first group of the transistor cells has a first body region average doping concentration. A second group of the transistor cells has a second body region average doping concentration higher than the first body region average doping concentration. The transistor cells of the first and second groups are interleaved. The transistor cells have a first source region density in a first area of the semiconductor substrate underneath a region of the source pad designated for clip contacting, and a second source region density lower than the first source region density in a second area of the semiconductor substrate outside the first area.

In a power semiconductor module including a snubber capacitor, the power semiconductor module capable of achieving both a high current density and prevention of heating of the snubber capacitor is provided. The power semiconductor module includes: a positive electrode terminal; a negative electrode terminal of which at least a part is disposed to overlap the positive electrode terminal in a plan view; a first wiring branching from the positive electrode terminal; a second wiring branching from the negative electrode terminal; and a snubber capacitor disposed outside of a position at which the positive electrode terminal and the negative terminal overlap each other in the plan view and connected through the first wiring and the second wiring.

A power module includes a insulation substrate, a first and a second input terminal supported by the insulation substrate, a plurality of arm circuits provided on the insulation substrate, and a plurality of output terminals corresponding to the plurality of arm circuits. The arm circuits each include a part of a wiring pattern formed on the insulation substrate, and a first switching element and a second switching element mutually connected in series via the part of the wiring pattern. The output terminals are each connected to a connection point between the first switching element and the second switching element in a corresponding one of the plurality of arm circuits. The plurality of arm circuits are located so as to overlap with a circle surrounding the first input terminal, as viewed in a thickness direction the insulation substrate.