A semiconductor device, including: a semiconductor chip including an electrode on an upper surface thereof; and a wiring member including a bonding portion, a rising portion, and a connecting portion, the bonding portion being bonded to the electrode via a bonding material, the rising portion being of a shape of a flat plate and extending upward from the bonding portion, the connecting portion connecting the bonding portion to the rising portion. The rising portion includes a lower region connected to the connecting portion and an upper region located above the lower region. Both the lower region and the connecting portion have a first thickness, and the upper region has a second thickness that is larger than the first thickness.

A semiconductor die and an electrically conductive ribbon are arranged on a substrate. The electrically conductive ribbon includes a roughened surface. An insulating encapsulation is molded onto the semiconductor die and the electrically conductive ribbon. The roughened surface of the electrically conductive ribbon provides a roughened coupling interface to the insulating encapsulation.

A semiconductor assembly includes a top substrate and a base substrate attached to top and bottom electrode layers of a semiconductor device, respectively. The top substrate includes an electrode connection plate thermally conductible with and electrically connected to the top electrode layer of the semiconductor device and vertical posts protruding from the electrode connection plate and electrically connected to the base substrate. The base substrate includes an electrode connection slug embedded in a dielectric layer and thermally conductible with and electrically connected to the bottom electrode layer of the semiconductor device and first and second routing circuitries deposited on two opposite surfaces of the dielectric layer, respectively, and electrically connected to each other.

A semiconductor apparatus includes: a base plate; an insulating circuit board including a ceramic substrate, a circuit pattern formed on an upper surface of the ceramic substrate, a metal layer formed on a lower surface of the ceramic substrate and fixed on an upper surface of the base plate with a first joint material; a semiconductor device having a first surface fixed on the circuit pattern with a second joint material and a second surface which is an opposite surface of the first surface; a lead frame fixed on the second surface with a third joint material; and a case fixed to an outer edge portion of the base plate and enclosing the semiconductor device, wherein restoring force acts on the insulating circuit board in a direction of warpage that is convex upward, and restoring force acts on the base plate in a direction of warpage that is convex downward.

A semiconductor package includes a lead frame, a low side field-effect transistor (FET), a high side FET, a metal clip, and a molding encapsulation. The low side FET is flipped and is attached to a first die paddle of the lead frame. The lead frame comprises one or more voltage input (Vin) leads; a gate lead; one or more switching node (Lx) leads; a first die paddle; a second die paddle; and an end paddle. Each of an exposed bottom surface of the one or more Lx leads is directly connected to an exposed bottom surface of the end paddle. A longitudinal direction of an exposed bottom surface of the gate lead is perpendicular to a longitudinal direction of each of the exposed bottom surface of the one or more Lx leads. An entirely of each of the one or more Vin leads is of the full thickness.

A semiconductor package includes a lead frame, a low side field-effect transistor (FET), a high side FET, a metal clip, and a molding encapsulation. The low side FET is flipped and is attached to a first die paddle of the lead frame. The lead frame comprises one or more voltage input (Vin) leads; a gate lead; one or more switching node (Lx) leads; a first die paddle; a second die paddle; and an end paddle. Each of an exposed bottom surface of the one or more Lx leads is directly connected to an exposed bottom surface of the end paddle. A longitudinal direction of an exposed bottom surface of the gate lead is perpendicular to a longitudinal direction of each of the exposed bottom surface of the one or more Lx leads. An entirely of each of the one or more Vin leads is of the full thickness.

A connector for contacting a semiconductor chip. The connector may include a tab, where the tab includes an outer portion, having a planar shape, the outer portion having a lower surface, adapted to contact a surface of the semiconductor chip, and an upper surface that defines a main plane of the tab. The tab may also include a ring portion, the ring portion connected to the outer portion and extending proud of the main plane, wherein the ring portion defines an inner hole within the tab structure, the inner hole being adapted to expose a contact portion of the surface of the semiconductor chip, wherein the ring portion includes at least two slots. The connector may further include a clip, comprising a connection portion, the connection portion having an aperture that is adapted to couple around the ring portion.

The on-resistance of a semiconductor device is reduced. A package structure composing the semiconductor device includes a die pad, a plurality of leads, a first semiconductor chip having a power transistor and mounted on the die pad, and a second semiconductor chip including a control circuit for controlling the power transistor and mounted on the first semiconductor chip. Here, a source pad of the first semiconductor chip is electrically connected to a first lead and a seventh lead of the plurality of leads via a clip made of a material which is copper as a main component, and the width (and cross-sectional area) of the clip is larger than the width (and diameter) of a wire in plan view.

A power semiconductor device includes: a substrate in which a positive electrode wiring connected to a first conductor on a high potential side and a negative electrode wiring connected to a fourth conductor on a low potential side are provided on one surface, and an output wiring connected to a second conductor and a third conductor is provided on the other surface so as to face the positive electrode wiring and the negative electrode wiring; and a first capacitor that smooths DC power supplied to a first upper-arm circuit body and a first lower-arm circuit body. The substrate is disposed between the first upper-arm circuit body and the first lower-arm circuit body. The first capacitor is disposed between the first upper-arm circuit body and the first lower-arm circuit body, and is connected to the positive electrode wiring and the negative electrode wiring on the substrate.

Semiconductor module including a semiconductor and including a shaped metal body that is electrically contacted by the semiconductor, for forming a contact surface for an electrical conductor, wherein the shaped metal body is bent or folded. A method is also described for establishing electrical contacting of an electrical conductor on a semiconductor, said method including the steps of: fastening a bent or folded shaped metal body of a constant thickness to the semiconductor by means of a first fastening method and then fastening the electrical conductor to the shaped metal body by means of a second fastening method.