Power semiconductor device assemblies are provided. In one example, a power semiconductor device assembly includes a semiconductor device package with one or more terminals. The semiconductor device package comprises one or more wide bandgap semiconductor die. The power semiconductor device assembly includes a support structure. The semiconductor device package is mounted onto the support structure. The power semiconductor device assembly includes an underfill structure. The underfill structure is at least partially on the support structure and the semiconductor device package.

Examples herein describe integrated circuit (IC) devices with cooling plates. An IC device includes a circuit board and an IC die mounted on a first side of the circuit board. A thermally conductive plate is disposed over the first side of the circuit board. Thermal interface material is disposed between the IC die and the thermally conductive plate. The IC device includes fins having a first end in contact with a side of the thermally conductive plate that contacts the thermal interface material and a second end that extends beyond a second side of the circuit board.

A direct cooling type power module comprising, an enclosure filled with an insulating fluid, a power semiconductor device disposed inside the enclosure and a bonding unit comprising a porous layer, and a thermally conductive layer to which the power semiconductor device is bonded, and allowing the power semiconductor device to exchange heat with the insulating fluid by the porous layer and the thermally conductive layer.

A hybrid integrated heat spreader suitable for an integrated circuit (IC) die package. The hybrid integrated heat spreader includes a top sheet material and a sealant interface material located where the heat spreader is to contact an assembly substrate. The sealant interface material may offer greater adhesion to a sealant employed between the interface material and the package substrate. In some examples, the sealant interface material has a greater surface roughness and/or a different composition than a surface of the integrated heat spreader that is in close thermal contact with an IC die through a thermal interface material. With the sealant interface material improving adhesion, the sealant may have a higher bulk modulus, enabling the integrated heat spreader to impart greater stiffness to the IC die package assembly.

An integrated circuit (IC) may include a pillar bar disposed in a bar area over a row of transistors to conduct a current through the transistors and to conduct heat away from the transistors. The pillar bar includes a top metal layer, a bottom metal layer coupled to a terminal of each of the transistors in the row, and at least one intermediate layer between the top metal layer and the bottom metal layer. When heated by the transistors, the metal in the pillar bar expands at a different rate than the IC substrate, causing heat-related stress that may damage the IC. In a pillar bar disclosed herein, one of the intermediate layers includes separate metal regions separated by a non-metal material in the bar area. The pillar bar includes a central metal region and separate metal regions between the central metal region and the ends of the pillar bar.

The present invention provides an integrated circuit package capable of independently assembling passive devices and a manufacturing method thereof. The integrated circuit package includes: an integrated circuit configured to be mounted on a circuit board; and a heat dissipation structure, which is manufactured independently and has a first-layer flat plate disposed above the integrated circuit and in thermal contact therewith, and a cavity located on one side of the first-layer flat plate. The cavity is formed with at least one opening to accommodate a passive device. During assembly, the passive device is inserted into the cavity of the heat dissipation structure through the at least one opening and is electrically connected to the circuit board or the integrated circuit via an electrical conductor of the passive device. Heat generated by the integrated circuit is transferred through the heat dissipation structure.

A chip packaging structure includes, a chip on a substrate; an enclosure structure on the chip, a wall of the enclosure structure comprises a sealed cavity, and the chip is revealed through the sealed cavity; a layer of thermal interface material for the chip, formed by filling a liquid metal into the sealed cavity of the wall of the enclosure structure; and a heat sink, formed on the layer of thermal interface material, is hermetically sealed to the wall of the enclosure structure. The heat sink component is formed on the layer of the thermal interface material, sealed and connected to the enclosure structure. The enclosure structure using flexible materials to prevent the liquid metal from overflowing in the encapsulation and application process, thereby reducing degradation. The UV curing adhesive is used for sealing and fixing the connection to the thermal interface material layer, so the disassembly and replacement of the process is simpler.

A package structure according to the present disclosure includes a package substrate, an interposer bonded to the package substrate, a first die and a second die bonded to the interposer by way of micro bumps, an underfill surrounding the micro bumps, disposed between the first die and the interposer as well as between the second die and the interposer, a metal layer interfacing the interposer, the underfill, sidewalls of the first die, and sidewalls of the second die, a molding material over the metal layer, and a thermal interface material disposed over the molding material, the metal layer, the first die, and the second die.

A semiconductor package structure according to the present disclosure includes a substrate, an interposer bonded to the substrate by way of a plurality of first type solder features, and an integrated circuit (IC) die bonded to the interposer by way of a plurality of second type solder features. The interposer includes a redistribution structure and a seal ring structure extending around the redistribution structure. At least one of the plurality of second type solder features is electrically coupled to the seal ring structure.

In some embodiments, a device includes a chip-on-interposer structure on a first side of a package substrate, and a first ring structure on the first side of the package substrate. The first ring structure extends around a perimeter of the chip-on-interposer structure. A lid may be disposed on the first ring structure. The device may also include an array of connectors on a second side of the package substrate, wherein the second side of the package substrate is opposite a first side of the package substrate. A second ring structure may be on the second side of the package substrate. The second ring structure is positioned around a perimeter of the array of connectors.